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Distance: Job alert Jobs 451 - 460 of 1489

Senior Electrical Engineer - Firmware (Onsite)

RTX  –  Santa Barbara, CA, 93116
... VHDL, Verilog, etc.). Experience in one or more of the following areas: Digital Signal Processing Intel/Altera, AMD/Xilinx and/or Microsemi FPGAs Designing in Matlab/Simulink with DSP Builder and HDL Coder blocksets Digital hardware design and ... - Sep 01

Test Chip Design & Validation Engineer

Apple  –  Santa Clara, CA, 95053
... System Verilog familiarity. JTAG protocol understanding. Preferred Skills: Knowledge of TC1500 Protocol. IEEE1687 (STAR SMS MBIST protocol). Statistical data manipulation and reporting. Experience with FPGA based systems. Pay & Benefits At Apple, ... - Aug 28

Embedded Hardware Engineer-FPGA, ASIC and Secure Systems

Secmation  –  Cedar Rapids, IA, 52404
... What You'll Do Design and implement FPGA-based systems using VHDL, Verilog, or SystemVerilog Develop scalable, modular system architectures using chiplet and high-bandwidth interconnect technologies (e.g., UCIe) Support full FPGA development ... - Aug 22

Applications Engineer

Infleqtion  –  Louisville, CO
... Experience with Rust and hardware description languages (e.g., Verilog, VHDL, or similar) is a plus. Familiarity with simulation and modeling tools such as Simulink, MATLAB, Ansys, COMSOL, or Python-based simulation libraries. Hands-on lab ... - Sep 04

ASIC Engineering Technical Leader - SDC

Cisco  –  San Jose, CA
... Synopsys DC/DCG/FC), Verilog/System Verilog programming. Preferred Qualifications: Experience with constraint analyzer tools such as TCM (Timing Constraint Manager from Synopsys) and CCD (Conformal Constraint Designer from Cadence). Experience with ... - Sep 01

Embedded Hardware Engineer-FPGA, ASIC and Secure Systems

Secmation  –  Huntsville, AL, 35824
... What You'll Do Design and implement FPGA-based systems using VHDL, Verilog, or SystemVerilog Develop scalable, modular system architectures using chiplet and high-bandwidth interconnect technologies (e.g., UCIe) Support full FPGA development ... - Aug 22

RTL Design Engineer

Capgemini  –  Stevenson Ranch, CA, 91382
... Your role Design and maintain RTL for SoC and subsystem components using Verilog/SystemVerilog Collaborate with architecture, design, and verification teams across multiple time zones Support synthesis, timing closure, and power optimization efforts ... - Sep 01

Physical Design Lead

Waymo  –  Mountain View, CA, 94039
... plan, power and IO planning Experience in designing digital logic and/or Design For Testability (DFT) structures in System Verilog or equivalent We prefer: Track record of successfully driving custom / semi-custom silicon engagements with external ... - Aug 08

Graphics (GPU) RTL Design Engineer

Apple  –  Santa Clara, CA, 95053
... Minimum Qualifications Experience in GPU, CPU, or SIMD architectures Knowledge of System Verilog HDL Experience in Logic design, including knowledge of low-power techniques and timing optimizations BS degree and minimum of 10 years of experience ... - Aug 28

Lead Memory Controller Architect/uArch (Principal Engineer)

Samsung Electronics Co., Ltd.  –  Rollingwood, TX, 78716
... Strong expertise in Verilog and ASIC design flow, including RTL design, verification, synthesis, timing analysis, and ECO. Proficiency in scripting languages (Perl, Python) to support design and automation. Strong communication and collaboration ... - Aug 28
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