| Job alert | Jobs 31 - 40 of 1793 |
Memory Controller Digital Design Engineer
Jobot
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Atlanta, GA
... Design various logic and state machines in System Verilog/Verilog RTL. Develop and debug RTL using simulation and synthesis tools as well as LEC, CDC, Lint, DFT and STA tools. Provide PPA (Power, Performance, Area) and schedule estimates and design ... - May 02
FPGA Engineer - Hardware Design
Oscar
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Fort Meade, MD
... The Skills Proven experience with Python Programming and C/C++ Experience integrated circuit or microelectronic component design Experience Reverse Engineering Experience with Assembly, FPGA Design and Hardware Description Languages (Verilog or VHDL ... - Apr 17
Senior Physical Design Engineer
Mirafra Technologies
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Texas
... and Verilog to collaborate with RTL and IP design teams for timing fixes • Contribute to timing flow and methodology improvements Key Challenges: • Demonstrate a strong knowledge of all aspects of timing and synthesis for a wide variety of designs. ... - May 09
Lead Design Verification Engineer
SARACA
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Bengaluru, Karnataka, India
... Proficient in IP level ASIC verification Proficient in debugging firmware and RTL code using simulation tools Proficient in using UVM testbenches and working in Linux and Windows environments Experienced with Verilog, System Verilog, C, and C++ FW ... - May 11
RTL ASIC Design Engineer
Wipro
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Sunnyvale, CA, 94087
... · Expertise in Verilog & System Verilog is a must. · Experience in Synthesis / Understanding of timing concepts for ASIC is required. · Experience in design of DDR / USB /SATA/ PCIe controller or such complex protocols is a plus. · Hands on ... - May 04
Senior ASIC Design Engineer
European Recruitment
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Canada
... and execute RTL logic (predominantly Verilog or System Verilog), conduct block-level simulation, ASIC synthesis, DFT insertion, and ensure timing closure. closely with the verification team, design team, hardware team, and support team. lab bring-up ... - May 05
SoC Integration Engineer - Strictly W2
Hire IT People, Inc
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San Jose, CA
... Half the team exposed to UVM and basic to good UVM working/debug background knowledge Bonus points if: Proficient with System Verilog/Verilog RTL source code Proficient with Synopsys Design Compiler and/or Design Compiler Ultra Python, tcl and other ... - May 03
Lead Digital Design Verification Engineer - UVM
Softworld Inc
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Cambridge, MA, 02140
Job Title: ASIC/FPGA Verification Engineer - UVM Job Location: Cambridge MA 02139 (remote work is available) Onsite Requirements: UVM System Verilog FPGA/ASIC Job Description: The Client is seeking a motivated and experienced Senior Verification ... - May 02
Mirafra Technologies - Verification Lead - Verilog/System Verilog
Mirafra Tehchnologies
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Mathikere, Karnataka, 560012, India
Proficiency in Verilog and SystemVerilog for hardware description and verification. Methodologies : - Experience with Universal Verification Methodology (UVM) is preferred, with familiarity in OVM and VMM. Scripting : - Knowledge of scripting ... - Apr 30
Principal FPGA Engineer
Ascendion Inc.
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Ladera Ranch, CA, 92694
... s degree in electrical engineering or a scientific/engineering discipline Minimum 7 years of experience (must be recent) with Xilinx FPGA design and simulation methods using VHDL, Verilog, and/or System Verilog hardware description languages. ... - May 09