| Job alert | Jobs 21 - 30 of 1709 |
Engineer Digital 3
PDS Tech Commercial
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Azusa, CA, 91702
... If you have experience writing System Verilog and UVM, this is the opportunity you should apply for! Job Title: Engineer Digital 3 Job Type: Full time; 6 month contract Schedule: 9x80 Location: Azusa, CA Pay Rate: $71 per hour Job Summary The ... - May 12
IP Verification Engineer
Triple Crown
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Mountain View, CA, 94039
... Requirements: SOC Verification- PCIe Gen 6 Experience with UVM/System Verilog Testbench from scratch Experience with Microcontroller IP Verification Benefits: Paid weekly! Health, dental and vision insurance 401K Benefits found in job post - May 09
Design Verification Engineer
Mastech Digital
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Texas
Role Overview Current state of the art testbench development such as UVM methodology Experience in design verification with UVM and System Verilog is a MUST As a Design Verification Engineer, you will contribute to the functional verification of GPU ... - May 02
Senior FPGA Engineer
Amphib Digital LLC
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Tysons, VA
... Significant experience designing FPGA with VHDL or Verilog. Knowledgeability in software defined radio a huge plus. Programming experience with C, C++, python very useful. MATLAB a huge plus. Agnostic implementation on FPGA systems; focus on COTS ... - Apr 27
Senior Digital Design Engineer
European Recruitment
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Ottawa, ON, Canada
Digital ASIC Design Engineer - RTL / ASIC Syntheses / DfT insertion / Verilog / SystemVerilog Ideally, you should have a minimum of 8+ years of relevant experience in Digital ASIC design and are willing to move to Ontario, Canada. You will receive a ... - May 09
Lead Digital Design Verification Engineer - UVM
Softworld Inc
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Cambridge, MA, 02140
Job Title: ASIC/FPGA Verification Engineer - UVM Job Location: Cambridge MA 02139 (remote work is available) Onsite Requirements: UVM System Verilog FPGA/ASIC Job Description: The Client is seeking a motivated and experienced Senior Verification ... - May 02
Hardware Engineer (FPGA)
Softworld Inc
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Lexington, MA
... Familiarity with software development in C/C++ Familiarity with UVM and System Verilog Qualification Assessment Must Have Degree Level Bachelor's Degree Yes Electrical/Electronics Xilinx FPGA 5 years Programming FPGA Programming 5 years VHDL / ... - May 09
Sr. FPGA Engineer
Analog Photonics
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Boston, MA, 02298
... the firmware you design Experience developing electronics hardware architectures Must be proficient in a HDL language: Verilog or VHDL Motivated to work in a multidisciplinary team including systems, electrical, photonics and CMOS engineers ... - Apr 28
Senior FPGA Designer
Lumentum
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Canada
... definition Mentoring of junior engineers Required Qualifications [Must-Have]: Solid experience in ASIC or FPGA Verilog/SystemVerilog design, simulation, synthesis, constraints, timing analysis, clock domain crossing Clear, robust and well ... - Apr 26
Design Verification Engineer
Intelliswift Software
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San Jose, CA
Design Verification Engineer - Remote / San Jose, CA Duration – 6 months + (can be extended longer) San Jose, CA / Remote Design Verification Engineer UVM System Verilog Test Bench Development SystemC (preferred) strong C/C++ - Apr 26