| Distance: | Job alert | Jobs 11 - 20 of 1069 |
Mixed Signal Design Engineer (DAC / ADC) - Visas Supported
European Tech Recruit
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North Rhine-Westphalia, Germany
... - Experience in C / MATLAB / Verilog modeling. Support silicon bring-up, lab validation, and debugging of first silicon. - Document design and verification results, and support IP integration into customer products. Your Profile M.Sc. or Ph.D. in ... - Jul 18
GPU Design Engineer Memory Hierarchy
Apple
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Santa Clara, CA
$181,100-$318,400/year
... Experience in scripting languages such as Perl, Python and Ruby Proficiency in high performance, low power designs Proficiency in Verilog/System Verilog and HDL Hands-on experience with RTL or architectural modeling Able to work in an environment of ... - Jul 06
Design Engineer
Donatech
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Harrisburg, PA, 17124
... • Knowledgeable in VHDL, Verilog or System Verilog RTL coding and highly proficient in DFT methodologies. • Responsible for operating in a team environment and collaborating across the different teams as required to accomplish the goals. Basic ... - Jul 17
Senior PLL Engineer
European Tech Recruit
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Aachen, North Rhine-Westphalia, Germany
... Key Responsibilities: Design PLL building blocks: VCOs, charge pumps, PFDs, loop filters, dividers Perform transistor-level and behavioral simulations (Spectre, HSPICE, Verilog-A/AMS) Optimize for jitter, power, and area Work closely with layout, ... - Jul 18
Cellular ASIC Design Integration Engineer
Apple
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San Diego, CA
$171,600-$302,200/year
... Strong knowledge of RTL design and HDL languages (Verilog, System Verilog, etc.) Strong analytical skills to be able to make design tradeoffs for best performance, low area, and low power. Experience in driving power improvements based on power ... - Jul 06
Emulation Verification Engineer
Apple
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Sunnyvale, CA
$126,800-$190,900/year
... •Develop code for Design and verification that aids with emulation activities, using Verilog/System Verilog/UVM. Bachelors degree. Experience with System Verilog, Verilog or UVM. MS and 3+ years of industry experience with bring-up, debugging, and ... - Jul 06
ASIC Engineer Remote )
TalentPro Consulting
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Baltimore, MD, 21298
... Knowledgeable in VHDL, Verilog or System Verilog RTL coding and highly proficient in DFT methodologies. Responsible for operating in a team environment and collaborating across the different teams as required to accomplish the goals. Basic ... - Jul 16
REMOTE - Design Engineer 3 - ASIC #2663
Amarx Search, Inc.
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Baltimore, MD
$75.50 - 98.00
... 8: Experience working with test engineers to implement ATPG vectors on tester hardware 9: Proficiency in HDL (VHDL/Verilog/System Verilog) and scripting languages such as Tcl, Python or Perl 10: Effective communication and presentation skills ... - Jul 14
Cellular ASIC Design Integration Engineer
Apple
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Sunnyvale, CA
$181,100-$318,400/year
... Strong knowledge of RTL design and HDL languages (Verilog, System Verilog, etc.) Strong analytical skills to be able to make design tradeoffs for best performance, low area, and low power. Experience in driving power improvements based on power ... - Jul 06
(Sr./Staff) ISP RTL Design Engineer
Omnivision Technologies, Inc.
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Singapore, Central Singapore Community Development
Responsibilities: Responsible for implementing ISP Algorithm into HW using Verilog, SystemVerilog and/or SystemC (High Level Synthesis) Define ISP HW Architecture based on product features and performance requirements, also with gate count and power ... - Jul 04