| Distance: | Job alert | Jobs 1 - 10 of 237741 |
ASIC Design Engineer
Apple
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Santa Clara, CA
$181,100-$318,400/year
The ideal candidate will have experience in ASIC design with: - Architecture research and/or development of memory or highly interconnected system architectures. - RTL/micro-architecture. - Knowledge of high-performance memory subsystem, including ... - Jul 06
STA Design Engineer
Cybotic Systems
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San Jose, CA
... diagrams and mentor other RTL design owners on SDC development. · Creating fullchip clocking diagrams and related documentation. What We Are Looking For: · Bachelor’s Degree in Electrical or Computer Engineering with 7+ years of ASIC or related ... - Jun 20
Cellular ASIC Design Integration Engineer
Apple
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San Diego, CA
$171,600-$302,200/year
... Thorough knowledge of the ASIC design flow, FE, Low power design and design verification, scripting. Strong knowledge of ASIC/SoC design flow. Strong knowledge of FE tools (CDC, RDC, LINT, Formal, LP Checks, LEC, PTPX). Strong knowledge of RTL ... - Jul 06
Cellular ASIC Design Integration Engineer
Apple
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Sunnyvale, CA
$181,100-$318,400/year
... Thorough knowledge of the ASIC design flow, FE, Low power design and design verification, scripting. Strong knowledge of ASIC/SoC design flow. Strong knowledge of FE tools (CDC, RDC, LINT, Formal, LP Checks, LEC, PTPX). Strong knowledge of RTL ... - Jul 06
ASIC/SOC Silicon Physical Design Engineer
MatX
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Mountain View, CA
... from early RTL to production silicon Experience collaborating with Design, Verification, and DFT teams to structure, partition, and optimize designs for PPA through sign-off Preferred Experience: 8 years of industry experience in ASIC Physical ... - Jul 16
RTL Design Engineer
Apple
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San Diego, CA
$171,600-$302,200/year
... You will be also responsible for RTL coding of blocks specified by you or others. You will participate in the design verification and bring-up of such blocks by writing meaningful assertions, debugging code, and otherwise interacting with the design ... - Jul 06
ASIC Design & Integration Engineer
Apple
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San Diego, CA
$171,600-$302,200/year
... at every stage of the design process. In this highly visible role, you will be at the center of the ASIC Integration effort ... design for wireless communication SoCs, including: Write specifications and Microarchitecture definition. IP integration, RTL ... - Jul 05
RTL Design Engineer
Apple
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Cupertino, CA
$181,100-$318,400/year
... You will be also responsible for RTL coding of blocks specified by you or others. You will participate in the design verification and bring-up of such blocks by writing meaningful assertions, debugging code, and otherwise interacting with the design ... - Jul 06
ASIC RTL Design Engineer
Google
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Sunnyvale, CA
$132,000-$189,000 +
... Responsibilities Work separately and collaboratively to create and review ASIC/SoC subsystem design architecture and microarchitecture specifications. Develop SystemVerilog RTL to implement logic for ASIC/SoC products according to established coding ... - Jul 04
ASIC Design & Integration Engineer
Apple
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Sunnyvale, CA
$147,400-$272,100/year
... at every stage of the design process. In this highly visible role, you will be at the center of the ASIC Integration effort ... design for wireless communication SoCs, including: Write specifications and Microarchitecture definition. IP integration, RTL ... - Jul 06