| Job alert | Jobs 21 - 30 of 143 |
Senior DFT Engineer - All levels
Oho Group Ltd
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Mountain View, CA, 94039
... and structural debug concepts and methodologies, including JTAG, IEEE1500, MBIST, scan dump, and memory dump Proficiency in Verilog, experience with simulators, and waveform debugging tools Knowledge of Verilog/SystemVerilog Familiarity with Python, ... - Apr 27
Senior ASIC Design Engineer San Jose On-Site Excellent Salary +
Orbis Group
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San Jose, CA
... Ideal Requirements for the Senior ASIC Design Engineer Vacancy: • Several years of ASIC design experience with a demonstrable track record of RTL logic design in multi-million gate ASICs with Verilog or System Verilog. • Experience in IP integration ... - May 02
Design Verification Engineer
Capgemini Engineering
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Santa Clara, CA, 95053
... System Verilog assertions experience. Familiarity with C/C++ model integration in verification environments. Debug skills at IP and subsystem level. Good to have: GLS verification knowledge. Low power – UPF – verification. ARM based SoC level ... - Apr 28
PLL CIRCUIT DESIGN ENGINEER
TekWissen ®
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Santa Clara, CA, 95053
... Have good experience with simulation tools such as Spectre, Hspice, AFS, and MATLAB, System Verilog, Python. Capable of understanding DRC and LVS results with verification tools (Calibre, ICV, or like) Proficiency in scripting languages like Perl, ... - May 02
Senior ASIC Verification Engineer San Jose On-Site Excellent
Orbis Group
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San Jose, CA
... hierarchy, Cache coherency, Virtual memory, Multicore CPU operation • Familiarity with AMBA/APB/AXI Protocol • Familiarity with processor peripheral interfaces like SPI, eMMC, *MII, GPIO, I2C • Excellent Verilog/System Verilog programming skills. ... - Apr 15
DFT Engineer
Park Lane Recruitment Ltd
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Milpitas, CA
160000 - 185000
... PRIMARY SKILLS:Dft, Lbist, Mbist, Verification, Test, Verilog SECONDARY SKILLS:ASIC EMPLOYMENT TYPE:Full Time/Direct Hire LOCATION:Milpitas, California WORK EXPERIENCE (YEARS):8 15 REMOTE STATUS:Partially Remote CLIENT WILLING TO SPONSOR: NO PRIMARY ... - May 01
C++ / Compiler Engineer
Intelliswift Software
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San Jose, CA
... Nice-to-Have Skills: Familiarity with System Verilog and hardware design concepts. Ability to contribute to hardware-related aspects of compiler development. Qualifications: Bachelor's degree in Computer Science, Engineering, or related field. ... - Apr 22
DFT Engineer (SoC product development)
ATR International
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Milpitas, CA
... · Strong knowledge of DFT methodologies, industrial standards, and practices · Strong working knowledge of Chip design, Verilog/System Verilog, and design verification · Experience with STA tools like Primetime, SDF generation and Gate-level ... - Apr 24
Integrated Circuit Design Engineer
Unreal Gigs
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San Jose, CA
... Experience: Minimum 8+ years of experience in IC Design with a solid understanding of analog and digital design, Verilog, and familiarity with device physics. Benefits Competitive salary with potential for bonuses based on performance. Comprehensive ... - Apr 23
RTL Design Engineer - Senior (US)
Managed Staffing
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Santa Clara, CA, 95054
JOB DUTIES: Responsible for RTL design using Verilog HDL for implementation and debug. Read and comprehend System on Chip level architectural specification. Write microarchitecture specification for new and modified functions. Responsible for ... - Apr 24