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Senior Design Verification Engineer

Mirafra Technologies  –  Bangalore Urban, Karnataka, India
... Experience Languages: System Verilog 3. Methodologies: OVM/UVM/VMM 4. Protocols: PCIE/NVMe/DDR/Ethernet 5. Processor/ARM Based SoC Verification experience 6. Candidate must have expertise in System Verilog. 7. Experience in ARM base SoC Verification ... - May 16

AMS Verification Engineer (Analog Mixed Signal)

Spot Your Leaders & Consulting  –  Hyderabad, Telangana, India
Job Title :Senior Engineer - AMS Verification Job Description BE/B.Tech in ECE /M.Tech in VLSI with 3 to 9 years experience in Analog Mixed Signal Verification • Good experience in Verilog AMS, Verilog-A, WREAL, modelling of Analog blocks • Good ... - May 18

AMS Verification Engineer (Analog Mixed Signal)

Spot Your Leaders & Consulting  –  India
Job Title :Senior Engineer - AMS Verification Job Description BE/B.Tech in ECE /M.Tech in VLSI with 3 to 9 years experience in Analog Mixed Signal Verification • Good experience in Verilog AMS, Verilog-A, WREAL, modelling of Analog blocks • Good ... - May 18

Design Verification Engineer

Raiton Semiconductor Pvt Ltd  –  Bengaluru, Karnataka, India
Skills: Verilog, SV, UVM Protocol Knowledge: PCIe, MIPI 1. Very Strong knowledge of Verilog, System Verilog and UVM. 2. Good communication skills. 3. Hands on experience in PCIe or MIPI Experience : 5+ years (Hands on Experience) Notice: 15 to 30 ... - May 17

Design Verification Engineer

Raiton Semiconductor Pvt Ltd  –  India
Skills: Verilog, SV, UVM Protocol Knowledge: PCIe, MIPI 1. Very Strong knowledge of Verilog, System Verilog and UVM. 2. Good communication skills. 3. Hands on experience in PCIe or MIPI Experience : 5+ years (Hands on Experience) Notice: 15 to 30 ... - May 17

Analog Mixed Signal Engineer

HCLTech  –  Bengaluru, Karnataka, India
... Job Description: 3 to 8 yrs Location - Bangalore/Hubli/Kolkata · AMS verification at SoC (chip) and block level using netlist and/or models · AMS Modeling using verilog, verilog-A, verilog-AMS, system verilog, etc. · Good understanding on operation ... - May 12

SOC Verification Engineer

Wipro  –  Ahmedabad, Gujarat, India
... • Good debug skills • System Verilog / UVM knowledge In addition Formal, Assertions, Coverage etc.. are positives. • Netlist simulation experience - May 16

Physical Design Engineer

TEKsystems  –  Noida, Uttar Pradesh, India
... • Job Location(s): India - Noida • Experience and knowledge of Verilog, System Verilog. • Experience with System Verilog and front-end tooling (lint, CDC, RDC, etc.) is required, as well as highly efficient FE methodologies. • Good knowledge of ... - May 12

Physical Design Engineer

TEKsystems  –  India
... • Job Location(s): India - Noida • Experience and knowledge of Verilog, System Verilog. • Experience with System Verilog and front-end tooling (lint, CDC, RDC, etc.) is required, as well as highly efficient FE methodologies. • Good knowledge of ... - May 12

AMS Verification Lead

Cyient  –  Hyderabad, Telangana, India
... BE/B.Tech in ECE /M.Tech in VLSI with 9 years experience in Analog Mixed Signal Verification Very Good experience in Verilog AMS, Verilog-A, WREAL, modeling of Analog blocks Very Good experience in Analog Mixed Signal verification simulation ... - Apr 25
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