| Job alert | Jobs 51 - 60 of 532 |
ASIC Digital Design, Staff Engineer
Synopsys India Private Limited
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VasanthaNagar, Karnataka, 560001, India
... Knowledge of one or more of protocols/standards: VESA VDC-M, DSC, HDMI 2.1, MIPI DSI, AMBA (AXI,APB,AHB) Good knowledge of Verilog/System Verilog/C/C++. Hands-on experience in writing script on shell, csh, TCL and python. Hands-on experience with ... - Apr 19
Lead Software Engineer
Trinity Technology Solutions LLC
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Bengaluru, Karnataka, India
... Expert in C/C++, System Verilog, Verilog, and UVM verification methodology. Knowledge of Verilog/System Verilog, digital simulation, and debugging is a must. Hands-on experience working with one or more of the following protocols is must – PCIe, USB ... - Apr 27
Design Verification
Wipro
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VasanthaNagar, Karnataka, 560001, India
... Architecture document • Reviewing and Revising: working towards meeting agreed upon acceptance criteria • Developing code in System Verilog, UVM (Universal Verification Methodology), C for Unit, Subsystem and SOC level verification • Performing RTL ... - Apr 07
FPGA Engineer
Paradigm Tech
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VasanthaNagar, Karnataka, 560001, India
... Experience building systems with Verilog/System Verilog Development of test harnesses using self-checking test benches, BFMs etc. Integration of the firmware on the desired hardware with other system components Qualification & Skills: Degree ... - May 02
RTL Design ENGINEER
Proxelera
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VasanthaNagar, Karnataka, 560001, India
... Skill set needed Verilog, SoC & Sub-system RTL Integration, knowledge of industry known standards Interfaces (AXI, AMBA, NOC, Fabric, UCIE, PCIE, SATA, DDR etc. etc.) Scripting (Shell, python, ruby, perl etc.), CDC & LINT Checkers, Synthesis, LEC, ... - Apr 26
DFT Engineer
TekWissen India
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VasanthaNagar, Karnataka, 560001, India
... Experience in Design for Test of large, geometry SOC designs Experience in DFT concepts and test mode Good knowledge in Boundary SCAN, ATPG and memory testing Proficiency in VHDL/Verilog coding, test bench setup, test case creation and verification. ... - Apr 05
Test & Validation Engineering, Sr Engineer
Synopsys India Private Limited
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VasanthaNagar, Karnataka, 560001, India
... HDL Languages coding experience preferably in Verilog/VHDL/System Verilog -Some understanding in Formal verification, Simulation, writing of system verilog assertions, constraints properties -Based on project assigned, the job would involve one or ... - Apr 13
FPGA design
Alp Consulting Ltd.
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VasanthaNagar, Karnataka, 560001, India
Design JD: 5+ experience in FPGA design using VHDL. Strong skills on synthesis, CDC and linting. Exposure or basic knowledge on system Verilog to align with the verification team for troubleshooting the issues Full time - Apr 05
Staff Design Verification Engineer
Renesas Electronics
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VasanthaNagar, Karnataka, 560001, India
... Must be good in building verification environments preferably using the verification subset of high-level languages like System Verilog (OVM, UVM). Must be proficient in Verilog (System Verilog preferred). Understanding or prior experience with ... - Apr 10
SPE Verification Engineering
Rambus
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VasanthaNagar, Karnataka, 560001, India
... Bachelors Degree or above in EE/CS, minimum 10-15 years experience with HDL logic Design-Verification System Verilog / UVM testbench, Verilog/System Verilog logic design/RTL fluency a must Pre-existing Experience / familiarity with PCI ... - May 02