| Job alert | Jobs 41 - 50 of 529 |
Analog Mixed Signal Verification
Texas Instruments
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VasanthaNagar, Karnataka, 560001, India
... the IP teams and system teams to derive and understand the Analog-Digital boundaries Work with IP owners to get the right schematic netlists or models needed for SoC AMS DV Modeling IPs as needed in Verilog/system Verilog/Verilog-a, Verilog ams etc. ... - Apr 26
ASIC Engineer, Implementation
Meta
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Bengaluru, Karnataka, India
... Experience Knowledge of RTL coding using Verilog/System Verilog. Experience with Timing/physical libraries, SRAM Memories. Experience with Power, Performance, Area Analysis and techniques for reducing power. Experience with Clock Domain Crossing, ... - Apr 17
Applications Engineering, Staff Engineer
Synopsys India Private Limited
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VasanthaNagar, Karnataka, 560001, India
... Understanding of Verification concepts and writing test benches Should have very good hands on experience in Verilog and/or VHDL. Proven problem solving skills. Should have good experience in Synthesis, back end flow, FPGA architecture and ... - Apr 18
R&D Engineering, Staff Engineer
Synopsys India Private Limited
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VasanthaNagar, Karnataka, 560001, India
... He should be expert in C/C++ and have understanding of compiler and HDLs (Verilog/System Verilog). We need people with at least 7 years of experience in some EDA technology. Full time - Apr 13
Snr Design Verification Engineer
Tech Mahindra
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VasanthaNagar, Karnataka, 560001, India
Strong Debug, UVM, System Verilog Understanding Specs and Standards and developing relevant test plans Monitors, scoreboards, sequencers and sequences, that utilize scripts, System Verilog, UVM, and methodologies to increase the rate with which bugs ... - Apr 19
Verification Lead/Manager
Prodapt
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VasanthaNagar, Karnataka, 560001, India
Prodapt is looking for a Verification Lead/ Manager with hands-on experience in VLSI front end Verification Responsibilities Experience in developing the TB for verification of a complex design bloc using system verilog and UVM methodology. ... - May 02
Standard Cell Characterization with 2-5 years of experience
Capgemini Engineering
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VasanthaNagar, Karnataka, 560001, India
... Automation skills (Proficient in PERL/PYTHON/SHELL scripting) Good understanding of CMOS circuit design fundamentals Excellent communication skills Good if candidate has Hands-on experience on IP behavioural modeling (Verilog) Good understanding of ... - Apr 19
Sr.RTL ASIC Design Engineer
Tessolve
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Bengaluru, Karnataka, India
... Strong fundamental knowledge of digital design, Verilog, system Verilog and scripting languages Deep knowledge of IP/SoC design flows and methodologies (Lint, CDC, Synthesis/STA, Power) Excellent problem-solving skills. Team player with great ... - Apr 25
Design and Verification Engineer
Tech Mahindra
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Bengaluru, Karnataka, India
... verification plan/verification methodology/flows from scratch · Hands-on expertise with UMV (or similar) methodology, and Verilog/System Verilog (SV) · Experience in constraint-random verification and/or transaction-based verification · Experience ... - Apr 25
ASIC Digital Design, Staff Engineer
Synopsys India Private Limited
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VasanthaNagar, Karnataka, 560001, India
... Knowledge of one or more of protocols/standards: VESA VDC-M, DSC, HDMI 2.1, MIPI DSI, AMBA (AXI,APB,AHB) Good knowledge of Verilog/System Verilog/C/C++. Hands-on experience in writing script on shell, csh, TCL and python. Hands-on experience with ... - Apr 19