| Job alert | Jobs 41 - 50 of 121 |
Digital Circuit design
Cognitive Design Technology Pvt Ltd
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Bengaluru, Karnataka, India
... Familiarity with circuit and layout design, static timing analysis (STA) and power analysis methodologies. 4. Strong analytical skills and attention to detail for data analysis and problem-solving. 5. advanced process nodes (e.g., 16nm, 12nm, 6nm or ... - May 14
Engineering Delivery Head - Semicon & Embedded
Tech Mahindra
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Bengaluru, Karnataka, India
... for floor planning, place and route, STA, DRC/LVS and signoff on sub-nano meter technologies. Understanding of programming and scripting languages such as C/C++, Python, TCL or Perl. Embedded design at L1/L2 design level, understanding of functional ... - May 05
Physical Design Engineer - Lead
HARMAN India
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Bengaluru, Karnataka, India
... Job Description: SD Resources (PD + PV + STA) : PnR, floor planning, Bus planning, power planning, Synopsys ICC2, prime time, calibre, timing closure, Graphics SOC experience, with 6 to 8 Yrs Exp Minimum Requirements: The candidate must have a ... - May 03
Lead Physical Design Engineer
HARMAN India
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Bengaluru, Karnataka, India
... SD Resources (PD + PV + STA) PnR, floor planning, Bus planning, power planning, Synopsys ICC2, prime time, calibre, timing closure, Graphics SOC experience. What you will do: System level Validation in FPGA, ASIC, CPU or custom IC designs. Strong ... - May 06
RTL Principal Design Engineer
Cadence Design Systems
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Bengaluru, Karnataka, India
... -Lead and also hands-on end-to-end ASIC design including RTL implementation and design processes of Lint/CDC/SDC definition/STA/Synthesis. -Collaborate with cross-functional teams of Architecture, Verification, Physical Design, and Mixed Signal ... - May 20
Senior Digital Design Engineer
Mulya Technologies
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Bengaluru, Karnataka, India
... STA/lint/LEC/…) FPGA build up and verification What we expect to see: BS, MS or PhD in electrical engineering, computer engineering or computer science with a special focus on digital system design, computer architecture or computer hardware design. ... - May 19
Senior DFT Engineer
7Rays Semiconductors India Private Limited
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Bengaluru, Karnataka, India
... The candidate should have experience of providing test mode timing constraints to STA and PD teams. Additional knowledge of perl/tcl scripting will be an advantage. Good communication skills and debugging skills are a must to have qualities for this ... - May 05
Principal Solutions Engineer - AE
Cadence
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Bengaluru, Karnataka, India
... Innovus, ICC2, Fusion Compiler) Exposure and experience with Synthesis (Genus, RTL Compiler, Design Compiler) Experience with EDA tools in the IC digital implementation & signoff flows (STA tools) Strong STA and SDC debugging abilities are required. ... - May 01
SoC/Subsystems Static Timing Analysis Engineer, Silicon
Google Inc
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VasanthaNagar, Karnataka, 560001, India
... Experience with STA sign-off constraint authoring for full-chip level, tape-out sign-off requirements, checklists, and associated automation. Experience in one or more static timing tools: PrimeTime, Tempus, Timing Closure, STA, Timing ECO using ... - May 07
DFT Engineer
Sintegra Inc.
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Bangalore Urban, Karnataka, India
... and multi-million gate designs using vendor tools Have good exposure to cross functional areas including RTL & clocks design, STA, place-n-route and power, to ensure we are making the right trade-offs Experience in Silicon debug and bring-up on the ... - May 06