| Job alert | Jobs 1 - 10 of 47 |
STA Engineer
Alp Consulting Ltd.
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Ameerpet, Telangana, 500038, India
Job Role: STA Engineer: Experience: 4 to 15 years Location: Hyderabad/Bangalore Job Description: STA and timing closure/signoff experience with minimum 4 to 15 Years of relevant experience along with PD domain skill-set/knowledge.Candidate should be ... - Apr 05
STA Engineer
MosChip
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Ameerpet, Telangana, 500038, India
Job Title: STA Engineer Skills Required · 3-10 years of relevant experience in Synthesis/STA · Good knowledge and understanding of overall design Flow RTL to GDS. · Hands on Experience on Constraints Generation, Management for hierarchical designs. ... - Apr 05
MTS Silicon Design Engineer STA /Synthesis Lead )
Xilinx
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Ameerpet, Telangana, 500038, India
... This involves ownership of synthesis, LEC, CLP, prelayout STA and postlayout STA/Timing closure. Co-ordinate with design team and PNR teams. Guide team members on tenchical issues. KEY RESPONSIBILITIES: Responsible for front end implementation of ... - Apr 10
MTS Silicon Design Engineer STA /Synthesis Lead )
AMD
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Ameerpet, Telangana, 500038, India
... This involves ownership of synthesis, LEC, CLP, prelayout STA and postlayout STA/Timing closure. Co-ordinate with design team and PNR teams. Guide team members on tenchical issues. KEY RESPONSIBILITIES: Responsible for front end implementation of ... - May 02
Static Timing Analysis (STA) Engineer
Sevya Multimedia
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Hyderabad, Telangana, India
STA Design Engineer at Semiconductor product MNC design center. We need experienced Static Timing Analysis engineers to design and integrate an ARM-based SoC in cutting edge technology and with complex functionality. Skills: Overall 3+ years ... - May 02
STA
Vitestork Consulting Private Limited
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Ramgopalpet, Telangana, 500003, India
1) Staff Engineer - STA / Synthesis Job Description • Must have at least 5+years of experience, out of which at least 4 years should be related to STA/Synthesis. • Must have Involved in high Speed design tape-outs and constraint development across ... - Apr 05
MTS Silicon Design Engineer STA/Timing closure Lead with 7+Yrs )
Xilinx
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Ameerpet, Telangana, 500038, India
... This involves ownership of synthesis, LEC, CLP, prelayout STA and postlayout STA/Timing closure. Co-ordinate with design team and PNR teams. Guide team members on tenchical issues. KEY RESPONSIBILITIES: Responsible for front end implementation of ... - Apr 10
Senior Staff Physical Design Engineer
Mulya Technologies
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Hyderabad, Telangana, India
... Good understanding of static timing analysis (STA), EM/IR and sign-off. Strong hands-on experience with: Chip Level / Sub-chip level floor planning, partition, pin assignment, Power planning, Bump Planning, Pad Ring Creation, Block level physical ... - May 03
MTS Silicon Design Engineer Physical Design Lead with 8+Yrs )
Xilinx
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Ameerpet, Telangana, 500038, India
... KEY RESPONSIBILITIES: Explore and suggest new, innovative ideas related to PD and STA Should be able to define and refine PD and STA methodologies and flows Should be able to switch between real tapeout and methodologies swiftly on need basis ... - Apr 10
MTS Silicon Design Engineer Physical Design Lead with 8+Yrs )
AMD
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Ameerpet, Telangana, 500038, India
... KEY RESPONSIBILITIES: Explore and suggest new, innovative ideas related to PD and STA Should be able to define and refine PD and STA methodologies and flows Should be able to switch between real tapeout and methodologies swiftly on need basis ... - May 02