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Distance: Job alert Jobs 81 - 90 of 1053

ASIC Engineer, Design

META  –  Rollingwood, TX, 78716
... Degree must be completed prior to joining Meta 2+ years of experience in micro-architecture and RTL development for complex control and data path IPs OR Experience in SoC Micro-architecture, Design and Integration RTL development using Verilog, ... - Jul 16

SoC DFT Engineer

Apple  –  Austin, TX
... Knowledge of Verilog and/or VHDL, and experience with simulators and waveform debugging tools. Knowledge of industry standards for DFT and design tools. Proven Understanding of design verification (DV) methodologies for validating DFT implementation ... - Jul 10

ASIC Engineer Design

Meta  –  Bengaluru, Karnataka, India
... Responsibilities: ASIC Engineer Design Responsibilities: Architecture exploration Micro-architecture development RTL development using Verilog, System Verilog and HLS Lint, CDC, Synthesis, & Power Optimization Soft and hard IP identification, ... - Jul 10

Emulation Verification Engineer

Apple  –  Beaverton, OR
... code for Design and verification that aids with emulation activities, using Verilog/System Verilog/UVM - Develop random stimulus infrastructure by reusing existing UVM simulation constraints Minimum of BS + 3 years relevant industry experience. ... - Jul 19

DV Engineer

Mastech Digital  –  San Jose, CA
80USD - 100USD per hour
... - Knowledge in UVM, System Verilog/Verilog. - Prefer background in domains like CPU, GPU or other similar ASIC experiences. - Expect the ability to code. Education: Bachelor’s degree in computer science, Electrical/Electronic Engineering, ... - Jul 21

Eng Sr Prin - Elec

BAE Systems  –  Westminster, CO, 80021
... Expertise in VHDL/Verilog and System Verilog. Experience with FPGA design tools including Xilinx Vivado/Vitis and Mentor Modelsim/Questasim. Ability to work requirements and flow down for system/subsystem/box/board needs. Good communication skills ... - Jul 10

Digital IC Design Engineer

Apple  –  Sunnyvale, CA
$126,800-$190,900/year
... Logic design experience using System Verilog including high speed and deep sub-micron design. Familiarity with design tools for RTL simulation, debugging, synthesis and timing analysis. Familiarity with power management/techniques for low power ... - Jul 06

Eng Sr Prin - Elec

BAE Systems  –  Westminster, CO, 80021
... Expertise in VHDL/Verilog and System Verilog. Experience with FPGA design tools including Xilinx Vivado/Vitis and Mentor Modelsim/Questasim. Ability to work requirements and flow down for system/subsystem/box/board needs. Good communication skills ... - Jul 11

Principal Engineer, AMS Verification

Infinera  –  Yujing District, Tainan, 714, Taiwan
... • Hands-on in modeling and simulating with System-Verilog (WREAL), Verilog-AMS, and/or C, C++. • Have a decent understanding in CMOS analog / mixed signal design. Preferred Knowledge/Skill/Abilities: • Able to create IBIS-AMI model. • Can code in ... - Jul 16

RTL Design and Verification

BCforward  –  West Lake Hills, TX
... Effective behavioral modeling and testing of circuits in Verilog and System Verilog, as well as logical equivalence verification between Schematic and Verilog models. UPF (Unified Power Format) creation using low power techniques and handling ... - Jul 14
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