| Job alert | Jobs 71 - 80 of 1532 |
Application Specific Integrated Circuit Design Engineer
Mpowering People
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California
... Your responsibilities will span the full ASIC development lifecycle, including microarchitecture design, Verilog RTL implementation, third-party IP integration, design verification, synthesis, place-and-route, and timing closure. You will work ... - Jun 02
ASIC Verification Engineer
Wipro
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Mountain View, CA, 94039
ASIC verification experience with UVM (or similar methodology/tools) and excellent Verilog/System Verilog programming skills - must have previously worked on an engineering team that has taped out & successfully shipped at least one high speed ... - Jun 18
ASIC/RTL/SOC Design Engineer
Wipro
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Sunnyvale, CA, 94087
... Expertise in Verilog & System Verilog is a must. Experience in Synthesis / Understanding of timing concepts for ASIC is required. Static checking tools like Lint, CDC, RDC, Spyglass DFT etc experience required. Experience in design of DDR / USB ... - Jun 20
Principal Engineer, Digital IC
Sonova International
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Valencia, CA
... Confluence Further Requirements VHDL, Verilog, or SV, Questa or equivalent design verification tool Nice to Have Python, C/C++, Make, LINT, CDC, Synthesis, UVM, STA, ATPG, DFT Additional Remarks: Class-III medical industry experience is a plus. ... - Jun 08
Hardware Engineer
The Ash Group
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Mountain View, CA, 94039
... Proficient in Verilog/System Verilog coding constructs. Knowledge of front-end tools (Verilog simulators, Connectivity tools, CDC checkers, low power static checkers, linting) Experience with high speed PCIe designs and protocols. Experience with ... - Jun 02
Senior Electronics Engineer
Intellisense Systems
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Torrance, CA, 90501
$103,000-$160,000
... Develop firmware using our Common Libraries in C for PIC microcontrollers and VHDL or Verilog for FPGAs. Potential for some ARM based development. Develop and review technical data packages for assigned projects. Write plans for testing hardware for ... - Jun 05
ASIC Engineer
Juniper Networks
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Sunnyvale, CA
... Develop block level verification environment using Universal Verification Methodology (UVM) and System Verilog. Part-time tel... - Jun 18
Lead FPGA Electronic Warfare Design Engineer #2586
Amarx Search, Inc.
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Salt Lake City, UT
... :: Experience leading technical employees in complex FPGA design :: Skilled in either VHDL (preferred) or Verilog hardware development languages. :: Experience implementing Electronic Support signal processing. :: Experience implementing Electronic ... - Jun 13
Sr.-Principal ASIC Design Engineer
Tripod Networking
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California
... Required Qualifications: 6+ years of ASIC design experience with a demonstrable track record of RTL logic design in multi-million gate ASICs with Verilog or System Verilog. Experience in IP integration, specifically CPU IP into SoC. Knowledge of ARM ... - May 31
Senior FPGA Design Engineer
USA Tech Recruitment
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San Jose, CA
... Proficient in Verilog HDL and RTL design for Xilinx FPGA. Experience with Ethernet, PCIe, optical transceivers, signal integrity, and system bring-up. Basic UNIX OS, device drivers, and scripting knowledge. If this could be of interest, reach out at ... - Jun 18