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ASIC Design Engineer Intern
Ambarella
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Manhattan, NY, 10017
... Job Description Position Responsibilities: * Designing and implementing video compression logic, image processing logic, vector processing and neural network accelerator logics, and processor cores, in Verilog and System Verilog. * Logic design, ... - Oct 06
Senior Electrical Engineer
Caltek Staffing
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Van Nuys, CA, 91406
... Proficiency in FPGA design (Verilog/System Verilog, IP Cores, Test Bench Development, Timing Closure). Expertise in PCB design including RF design, signal conditioning, and power distribution circuits. Strong experience in PCB layout (materials ... - Oct 11
SoC Full Chip DV Engineer
Apple Inc.
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Austin, TX, 78719
... random verification process, functional coverage, code coverage, assertion methodology u0026 philosophy Knowledge of Verilog/SystemVerilog, digital simulation and debug Knowledge of computer architecture and digital design fundamentals Ability ... - Oct 22
Senior Digital Verification Engineer
Ethan Alexander Group
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San Francisco, CA
180000USD - 210000USD per year
... Strong knowledge of Verilog or VHDL, C. Capable of scripting and leveraging automation. Able to set up and maintain automated regressions. Ability to understand design specifications and map them to a test plan. Ability to implement test plans. ... - Oct 22
Silicon Power Engineer
Rivos
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Austin, TX
... Proficiency with Verilog and SystemVerilog RTL coding. Experience with the complete silicon design flow and evaluating power, performance, and area (PPA) trade-offs at the architectural, logic, and circuit levels. Hands-on experience with state-of ... - Oct 22
Design Verification Engineer
Apple Inc.
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San Diego, CA, 92140
... We also require additional responsibilities such as running and triaging regressions, tracking bugs, and analyzing coverage to achieve top results.Knowledge of computer architecture and digital design fundamentals Knowledge of Verilog or ... - Oct 22
Intern Digital RTL
Rambus
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Agoura Hills, CA
... Responsibilities Develop system Verilog RTL IP, logic, and state machines for next generation products Perform full chip integration and chip level simulations Estimate and track power, performance, area (PPA) tradeoffs for RTL designs Review and ... - Oct 20
DDR Design Engineer
Apple Inc.
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Waltham, MA
... Supporting silicon bring-up, performance and power characterization.RTL design using Verilog or SystemVerilog, assertion writing Design of state machines, data paths, arbitration and clock domain crossing logic Logic synthesis, timing constraints ... - Oct 22
Analog Design Engineer
Jobot
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Alpharetta, GA
... Apply knowledge of SystemVerilog, PMIC, Verilog A, Virtuoso, Calibre, and Spectre in the design and development process.3. Collaborate with cross-functional teams to define product specifications.4. Conduct design verification and validation, ... - Oct 21
Senior Silicon Design Engineer
Intel Corp.
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Austin, TX, 78719
... * Experience with System Verilog/SOC development environment. * Experience in scripting languages (i.e. PERL, TCL, or Python). * Experience with Hardware validation techniques (i.e. formal Verification, Test and Function Verification). Preferred ... - Oct 18