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Principal Digital Design Engineer

Monolithic Power Systems  –  San Jose, CA, 95119
... Qualifications: PhD/BS/MS in Electrical Engineering with emphasis in Digital Design/VLSI coursework. 10+ years’ experience in design plus verification of ASIC or FPGA Experience in power management DC-DC convertors + control topologies, such as PWM ... - Jun 18

Principal Digital Verification Engineer

Monolithic Power Systems  –  San Jose, CA, 95119
... Qualifications: PhD/BS/MS in Electrical Engineering with emphasis in Digital Design/VLSI coursework. 10+ years of strong experience in ASIC Verification. Experience in power management DC-DC convertors + control topologies, such as PWM control, ... - Jun 18

VLSI Layout Design Engineer

Sevya Multimedia  –  Hyderabad, Telangana, India
... What you get: Inducted in the advanced Analog VLSI projects Get an opportunity to work with clients that are world-class VLSI MNCs Skills: Hands-on knowhow in analog and mixed-signal layout techniques and experience with Cadence Layout tools ... - May 29

VLSI Technical SOC/TOP Level Verification Engineer

Broadcom  –  Electronic City, Karnataka, 560100, India
... Job Description: VLSI Technical engineer with 7-10 years of experience in SOC/TOP Level Functional verification He/she should have strong knowledge of following Working experience in IP / SoC /Subsystem/verification Expertise to develop Soc/Top ... - Jun 19

Semiconductor Recruitment Lead

Han Digital Solution  –  India
... The Prospective semiconductor lead should have excellent India VLSI talent landscape in order to build and maintain a pipeline of target companies and prospective candidates through a small team size up to 5. Additionally, they should be committed ... - Jun 09

Senior ASIC Design Verification Engineer

Tarana Wireless  –  Milpitas, CA
... with at least one of these: C++, Object Oriented Programming, UVM, System Verilog Strong knowledge on basic concepts of VLSI, SoC architecture Ethernet and packet processing experience The salary range for this position is: $130,000 to $175,000 ... - Jun 12

VLSI Layout Design Engineer

Sevya Multimedia  –  India
... What you get: Inducted in the advanced Analog VLSI projects Get an opportunity to work with clients that are world-class VLSI MNCs Skills: Hands-on knowhow in analog and mixed-signal layout techniques and experience with Cadence Layout tools ... - May 29

Sr./Staff Physical Design Engineer

Ambarella Corp  –  Santa Clara, CA
$150,000 - $190,000
... Requirements BS/MS in EE/computer science or equivalent experience 3- 5+ years’ experience, Good understanding in VLSI digital design/Layout/Timing closure Basic knowledge on circuit design, device delays, and timing at gate-level Familiar with ... - Jun 14

System Verilog and UVM - VLSI

Olive Green Consulting  –  Bengaluru, Karnataka, India
VLSI Verification Engineer Location: Bangalore (Hybrid Work Mode) Experience: 6 to 15 Years Salary: Open for Discussion Job Summary: We are seeking a highly skilled and experienced VLSI Verification Engineer to join our team in Bangalore. The ideal ... - Jun 18

System Verilog and UVM - VLSI

Olive Green Consulting  –  India
VLSI Verification Engineer Location: Bangalore (Hybrid Work Mode) Experience: 6 to 15 Years Salary: Open for Discussion Job Summary: We are seeking a highly skilled and experienced VLSI Verification Engineer to join our team in Bangalore. The ideal ... - Jun 19
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