| Distance: | Job alert | Jobs 41 - 50 of 1892 |
Senior NVM Circuit Designer
Mythic
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Austin, TX
... in NVM full chip circuit simulation setup, debugging, and verification Hands-on experience modeling circuits using Python, Verilog-A, and System Verilog Real Number Modeling Familiar and hands-on experience some or all memory circuit block design: ... - Oct 18
FPGA/ASIC Design Engineer with Security Clearance
Innova Solutions, Inc.
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New Jersey
100.00
... • Additionally, S/He will be responsible for writing/debugging tests/sequences for End-to-End simulation on UVM framework, with System Verilog Assertions, and writing/debugging C++ based SW driven validation on SOC evaluation boards (Xilinx MPSOC) ... - Oct 17
ASIC Design Verification Engineer
AvicenaTech
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Sunnyvale, CA, 94087
... Experience with hardware description languages (HDL) like Verilog/SystemVerilog for basic design understanding. Exposure to physical layer (PHY) or mixed-signal verification concepts. - Oct 07
Design Verification Manager(DV)
AvicenaTech
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Sunnyvale, CA, 94087
... Methodology Expertise: Deep, hands-on expertise in defining and deploying comprehensive, scalable verification environments using System Verilog and UVM. Project Execution: Proven track record of successfully driving the verification of at least two ... - Oct 06
Field Programmable Gate Array (FPGA) Engineer with Security Clearance
JRC
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Dahlgren Center, VA, 22448
... You will work with VHDL, Verilog, and high-level synthesis tools, collaborating with cross-functional teams to ensure efficient and reliable hardware integration. As a FPGA Engineer with JRC, you will... * Design and develop FPGA-based architectures ... - Oct 17
Senior Electrical Engineer
CalTek Staffing, Inc.
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Northridge, CA, 91325
150000USD - 175000USD per year
... Proficiency in FPGA design (Verilog/System Verilog, IP Cores, Test Bench Development, Timing Closure). Expertise in PCB design including RF design, signal conditioning, and power distribution circuits. Strong experience in PCB layout (materials ... - Oct 18
Principal Mixed Signal Design Engineer
Analog Devices, Inc.
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Beaverton, OR, 97075
... * Automated Digital Design: Familiarity with automated digital design tools and processes, including Verilog, synthesis, place & route, and static timing analysis (STA). * Team Leadership: Experience leading teams and/or projects. #LI-PG1 For ... - Sep 30
PMU Design Verification Engineer: Analog Mixed Signal Engineer
Apple Inc.
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Cupertino, CA, 95014
... Proficient in hardware descriptive languages: Verilog, System-Verilog, and/or Verilog-AMS code. Familiarity with authoring analog assertion checks to catch bugs. Capability to identify failure mechanisms and review verification results in analog IC ... - Oct 17
Silicon DDR Bringup and Validation Engineer
Rivos
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Imperial, CA, 92243
... Relevant knowledge of verification methodologies, Verilog simulation, waveform viewers, and emulation. Experience in silicon debug for logic, software, and physical issues. Experience with lab instruments such as logic analyzers and oscilloscopes. ... - Oct 18
Sr. DFT Verification Engineer, AI Hardware
Tesla
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Austin, TX, 78719
... What You'll Do * Create Verilog/System Verilog/UVM test benches to verify various DFT features in RTL such as SSN, compressed and uncompressed scan, memory BIST, JTAG, and boundary scan at block and SoC-level * Verify top-level features such as ... - Oct 17