| Distance: | Job alert | Jobs 21 - 30 of 1172 |
ASIC Verification Engineer
Cisco Systems, Inc.
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Maynard, MA, 01754
... Experience with HVL and HDL languages and tools, scripting and programming languages Verilog, System Verilog, C++, Perl and/or Python.Preferred Qualifications: UVM experience is a plus Strong problem solving, communication, and team skills. ... - Jul 16
Senior Emulation Engineer
Cisco Systems, Inc.
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San Jose, CA, 95134
... Prior emulation experience on platforms such as Palladium, Veloce, or Zebu as well as experience with compilation, debug, performance testing, and UVM Prior experience with RTL development for Emulation prototypes and Verilog, System Verilog. Prior ... - Jul 16
ASIC Verification Engineer
Cisco Systems, Inc.
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San Jose, CA, 95134
... prior experience with System Verilog and UVM methodology Prior experience in verifying complex blocks, clusters and top level for SoC Prior experience building test benches from scratch, hands on experience with System Verilog constraints, ... - Jul 16
Cellular ASIC Design Integration Engineer
Apple
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San Diego, CA
$171,600-$302,200/year
... Strong knowledge of RTL design and HDL languages (Verilog, System Verilog, etc.) Strong analytical skills to be able to make design tradeoffs for best performance, low area, and low power. Experience in driving power improvements based on power ... - Jul 06
Emulation Verification Engineer
Apple
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Sunnyvale, CA
$126,800-$190,900/year
... •Develop code for Design and verification that aids with emulation activities, using Verilog/System Verilog/UVM. Bachelors degree. Experience with System Verilog, Verilog or UVM. MS and 3+ years of industry experience with bring-up, debugging, and ... - Jul 06
ASIC Engineer Remote )
TalentPro Consulting
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Baltimore, MD, 21298
... Knowledgeable in VHDL, Verilog or System Verilog RTL coding and highly proficient in DFT methodologies. Responsible for operating in a team environment and collaborating across the different teams as required to accomplish the goals. Basic ... - Jul 16
REMOTE - Design Engineer 3 - ASIC #2663
Amarx Search, Inc.
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Baltimore, MD
$75.50 - 98.00
... 8: Experience working with test engineers to implement ATPG vectors on tester hardware 9: Proficiency in HDL (VHDL/Verilog/System Verilog) and scripting languages such as Tcl, Python or Perl 10: Effective communication and presentation skills ... - Jul 14
Cellular ASIC Design Integration Engineer
Apple
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Sunnyvale, CA
$181,100-$318,400/year
... Strong knowledge of RTL design and HDL languages (Verilog, System Verilog, etc.) Strong analytical skills to be able to make design tradeoffs for best performance, low area, and low power. Experience in driving power improvements based on power ... - Jul 06
(Sr./Staff) ISP RTL Design Engineer
Omnivision Technologies, Inc.
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Singapore, Central Singapore Community Development
Responsibilities: Responsible for implementing ISP Algorithm into HW using Verilog, SystemVerilog and/or SystemC (High Level Synthesis) Define ISP HW Architecture based on product features and performance requirements, also with gate count and power ... - Jul 04
Hardware Modeling Engineer
Cisco Systems, Inc.
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San Jose, CA, 95134
... Familiarity with digital design and HDLs such as Verilog or VHDL. Strong technical communication and documentation skills. Collaborative approach, with meticulous attention to detail and problem-solving abilities. Familiarity with networking ... - Jul 16