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Digital Design Engineer

TrellisWare Technologies  –  San Diego, CA, 92131
... To be considered for this position, you would need to meet, at a minimum, the knowledge, skills, and abilities listed here: Experience with VHDL/Verilog targeted to FPGA and/or ASIC platforms. Experience with industry standard simulation tools such ... - Jul 23

Digital IC Design Engineer

Apple  –  San Diego, CA
$139,500-$258,100/year
... Logic design experience using System Verilog including high speed and deep sub-micron design. Familiarity with design tools for RTL simulation, debugging, synthesis and timing analysis. Experience with power management/techniques for low power ... - Jul 06

RTL DESIGN ENGINEER

Canvendor  –  Dallas, TX, 75215
... If you possess hands-on experience and expert-level knowledge in RTL design, SoC integration of ARM core-based designs, and a deep understanding of Verilog/VHDL, we invite you to apply. Responsibilities: Execute RTL design and coding with expert ... - Jul 20

Senior Silicon Logic Design Engineer

Microsoft Corporation  –  Raleigh, NC, 27601
... Your responsibilities include: Implementing micro-architectural specifications in Verilog or SystemVerilog Expanding your micro-architectural knowledge and contributing to unit, subsystem, and SoC-level architecture Developing and integrating ... - Jul 19

SoC Security Architect - Platform Architecture

Apple  –  Austin, TX
... Good knowledge of Verilog/VHDL. Experience in C/C++ and interpretive language such as Perl/Python. - Jul 03

SoC Design Engineer

Omnivision Technologies, Inc.  –  Santa Clara, CA
... Qualifications : PhD or MSEE with 4+ years of digital design experience Familiar with digital design flow, including verilog RTL coding/simulation, synthesis, static timing analysis, and formality Knowledge of high performance and low power design ... - Jul 16

Senior Silicon Validation & Prototyping Engineer

Experis  –  Morrisville, NC, 27560
... Develop Verilog RTL and assist in building Synopsys HAPS prototyping platforms. Perform electrical and logic validation of DDR/HBM subsystems. Develop C/C++ test platforms and Python scripts for test vector generation. Collaborate closely with ... - Jul 14

Physical Design Engineer

Apple  –  Aloha, OR, 97078
... construction, Integration and Physical Verification + Shown Knowledge of Basic SoC Architecture and HDL languages like Verilog to be able with logic design team for timing fixes Power user of industry standard Physical Design & Synthesis tools + ... - Jul 07

Physical Design Engineer

Chelsea Search Group  –  Richardson, TX, 75081
... & design tradeoffs required • ITAR compliance approval required • Knowledge of MIPI, I2S, CAN protocols a plus • Skilled with Verilog/VHDL RTL and able to modify for timing or power closure • Production-proven experience with Floor planning at Chip ... - Jul 17

Sr. Hardware Design Engineer

Super Micro Computer  –  Tai'an, New Taipei City, Taiwan
... Experience with VHDL: While Verilog is preferred, familiarity with VHDL (VHSIC Hardware Description Language) is beneficial. Knowledge of Digital Design: Understanding of digital design principles, including state machines, timing analysis, and ... - Jul 24
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