| Distance: | Job alert | Jobs 131 - 140 of 1083 |
SoC Design Engineer
Omnivision Technologies, Inc.
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Santa Clara, CA
... Qualifications : PhD or MSEE with 4+ years of digital design experience Familiar with digital design flow, including verilog RTL coding/simulation, synthesis, static timing analysis, and formality Knowledge of high performance and low power design ... - Jul 16
Physical Design Engineer
Apple
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Aloha, OR, 97078
... construction, Integration and Physical Verification + Shown Knowledge of Basic SoC Architecture and HDL languages like Verilog to be able with logic design team for timing fixes Power user of industry standard Physical Design & Synthesis tools + ... - Jul 07
SoC Security Architect - Platform Architecture
Apple
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Austin, TX
... Good knowledge of Verilog/VHDL. Experience in C/C++ and interpretive language such as Perl/Python. - Jul 03
Senior Mixed-Signal Design Verification Engineer
Capgemini Engineering
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Santa Clara, CA, 95053
... Deep expertise in SystemVerilog, UVM, and SV Assertions, with a strong foundation in Verilog-HDL and scripting. Proven success in verifying ARM Cortex-based SoCs and working with interfaces such as GPIO, UART, SPI, SW, JTAG, and I2C. Proficient with ... - Jul 24
Front End Infrastructure/CAD Senior Engineer
Mastech Digital
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San Jose, CA
90USD - 110USD per hour
... - Expertise in UVM, System Verilog/Verilog. - Experience with FE CAD tools and SQL style databases and query commands. Education: Bachelor’s degree in Computer Science, Electrical/Electronic Engineering, Information Technology or another related ... - Jul 25
DFD (Design for Debug) RTL Execution Lead
Microsoft Corporation
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Austin, TX, 78703
... **Responsibilities** + Define the micro-architectural implementation spec for debug IP's, fabrics & implement the micro-architectural specification in Verilog or System Verilog. + Lead a team of engineers for IP & product DFD deliverables and ... - Jul 20
Sr. Hardware Design Engineer
Super Micro Computer
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Tai'an, New Taipei City, Taiwan
... Experience with VHDL: While Verilog is preferred, familiarity with VHDL (VHSIC Hardware Description Language) is beneficial. Knowledge of Digital Design: Understanding of digital design principles, including state machines, timing analysis, and ... - Jul 24
Senior Silicon Validation & Prototyping Engineer
Experis
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Morrisville, NC, 27560
... Develop Verilog RTL and assist in building Synopsys HAPS prototyping platforms. Perform electrical and logic validation of DDR/HBM subsystems. Develop C/C++ test platforms and Python scripts for test vector generation. Collaborate closely with ... - Jul 14
SoC RTL Security Design Engineer
Google
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Sunnyvale, CA
$156,000-$229,000 +
... 8 years of experience with RTL coding using Verilog/SystemVerilog. Experience with industry-standard EDA tools for simulation, synthesis and power analysis. Preferred qualifications: Master's degree or PhD in Electrical Engineering, Computer ... - Jul 24
RTL Design Engineer
Apple
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Watertown, MA, 02472
... Preferred Qualifications Solid understanding of mixed signal concepts, RTL design, Verilog and SystemVerilog. Good fundamental knowledge of front-end tools and methodologies (Verilog simulators, linters, clock-domain crossing, reset domain crossing, ... - Jul 17