| Job alert | Jobs 11 - 20 of 68 |
STA Lead - Cadence/Synopsys Tools
MY Search
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Bengaluru, Karnataka, India
... They are looking for STA Lead to be based at Bangalore and Noida with the following : - Ideal candidate will have 5 to 10 years of experience in field of Synthesis, STA & LEC - Strong in digital logic design, Synthesis, STA and LEC concepts - ... - Jun 20
Senior Physical Design Engineer
Wipro
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Bengaluru, Karnataka, India
... Floor planning, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical Verification. •Should have experience on Physical Design Methodologies and sub- micron technology of 28nm and lower technology nodes. •Should have experience on ... - May 31
STA Engineer - Physical Design/Synopsys
MY Search
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Pulikeshi Nagar, Karnataka, 560005, India
... They are looking for STA Engineer to be based at Bangalore and Noida with the following : - Ideal candidate will have 4 to 10 years of experience in field of Synthesis, STA & LEC - Strong in digital logic design, Synthesis, STA and LEC concepts - ... - Jun 20
Synthesis/STA Professional - E2E Support
MY Search
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Bengaluru, Karnataka, India
... They are looking for Synthesis / STA to be based at Bangalore with the following skills: - Total 4 to 10 years of experience in Synthesis using Synopsys DC/ Cadence RTL Compiler based tool set - Expertise in Synthesis for High Performance, Low Power ... - Jun 20
Physical Design Engineer
Wipro
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Bengaluru, Karnataka, India
... Floor planning, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical Verification. Should have experience on Physical Design Methodologies and sub-micron technology of 28nm and lower technology nodes. Should have experience on ... - May 25
ASIC Engineer, Implementation
Meta
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Bengaluru, Karnataka, India
... Develop Timing Constraints for RTL-Synthesis and PrimeTime-STA for the blocks and the top-level including SOC. Analyze the inter-block timing and come up with IO budgets for the various partition blocks. Develop Power Intent Specification in UPF for ... - Jun 03
Senior Physical Design Engineer
Sivaltech
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Bengaluru, Karnataka, India
... · Block level timing closure with sign off STA . · Block level ECO implementation involving netlist level logical changes. · Library performance analysis and fine tuning for implementation. · Excellent debugging skills in implementation issues and ... - Jun 18
Physical Design Engineer
NikSperri Technologies Private Limited
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Bengaluru, Karnataka, India
... With expertise in RTL Design, Integration, Verification, STA-Synthesis, Physical Design, and tapeout, NikSperri can execute complete design projects based on specifications or existing designs. The company has successfully delivered Analog Layout ... - Jun 22
ASIC Static Timing Analysis Engineer
Google
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Bengaluru, Karnataka, India
... + Experience with STA sign-off constraint authoring for full-chip level, tape-out sign-off requirements, checklists, and associated automation. + Experience in one or more static timing tools: PrimeTime, Tempus, Timing Closure, STA, Timing ECO using ... - Jun 11
Senior Physical Design Engineer
ACL Digital
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Bangalore Urban, Karnataka, India
... ● Well versed with the timing closure (STA), timing closure methodologies. ● Good Understanding of DRC, LVS,ERC and PERC rule files for lower tech node layout verification. ● Experience in lower tech nodes (7nm). ● Good automation skills in PERL, ... - Jun 20