| Distance: | Job alert | Jobs 1 - 10 of 243225 |
ASIC Design Engineer
Apple
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Santa Clara, CA
$181,100-$318,400/year
The ideal candidate will have experience in ASIC design with: - Architecture research and/or development of memory or highly interconnected system architectures. - RTL/micro-architecture. - Knowledge of high-performance memory subsystem, including ... - Jul 06
STA Design Engineer
Cybotic Systems
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San Jose, CA
... diagrams and mentor other RTL design owners on SDC development. · Creating fullchip clocking diagrams and related documentation. What We Are Looking For: · Bachelor’s Degree in Electrical or Computer Engineering with 7+ years of ASIC or related ... - Jun 20
ASIC/SOC Silicon Physical Design Engineer
MatX
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Mountain View, CA
... from early RTL to production silicon Experience collaborating with Design, Verification, and DFT teams to structure, partition, and optimize designs for PPA through sign-off Preferred Experience: 8 years of industry experience in ASIC Physical ... - Jul 16
ASIC/SOC Micro-Architect and RTL Design Engineer
MatX
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Mountain View, CA
... MatX is seeking silicon micro-architects and design engineers to join our team as we create best-in-class silicon for high-performance and sustainable GenAI. Successful candidates for these roles will be responsible for delivering performant and ... - Jul 22
RTL Design Engineer
Apple
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San Diego, CA
$171,600-$302,200/year
... You will be also responsible for RTL coding of blocks specified by you or others. You will participate in the design verification and bring-up of such blocks by writing meaningful assertions, debugging code, and otherwise interacting with the design ... - Jul 06
ASIC Design & Integration Engineer
Apple
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San Diego, CA
$171,600-$302,200/year
... at every stage of the design process. In this highly visible role, you will be at the center of the ASIC Integration effort ... design for wireless communication SoCs, including: Write specifications and Microarchitecture definition. IP integration, RTL ... - Jul 05
RTL Design Engineer
Apple
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Cupertino, CA
$181,100-$318,400/year
... You will be also responsible for RTL coding of blocks specified by you or others. You will participate in the design verification and bring-up of such blocks by writing meaningful assertions, debugging code, and otherwise interacting with the design ... - Jul 06
Ethernet ASIC Design Engineer
Cornelis Networks
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Wayne, PA, 19087
... design coverage. Define timing constraints for RTL blocks and work with Physical Design engineers to optimize timing closure. Support post-silicon validation, collaborating with hardware, firmware, and software teams to debug and resolve ASIC ... - Jul 20
Senior ASIC Design Engineer
Ethan Alexander Group
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San Francisco, CA
Job Description ASIC Design Engineer Responsibilities: Define and bring up FPGA platforms for pre-silicon validation and software development Map ASIC RTL to FGPA while minimizing code base differences Create and execute test plans for validating ... - Jul 21
ASIC Design & Integration Engineer
Apple
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Sunnyvale, CA
$147,400-$272,100/year
... at every stage of the design process. In this highly visible role, you will be at the center of the ASIC Integration effort ... design for wireless communication SoCs, including: Write specifications and Microarchitecture definition. IP integration, RTL ... - Jul 06