| Job alert | Jobs 11 - 20 of 174 |
Sr. ASIC Verification Engineers
Tripod Networking
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San Jose, CA
... Knowledge of ARM/MIPS/RISC-V Architectures, Memory hierarchy, Cache coherency, Virtual memory, Multicore CPU operation AMBA/APB/AXI Protocol Strong Verilog/System Verilog programming skills. Experience with UVM (or similar). B.S. degree in ... - May 30
RTL Design Engineer - AXI, Lint and CDC Santa Clara, CA - Onsite
Infobahn SoftWorld Inc
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Santa Clara, CA, 95054
... & Day of birth (MM/DD): Present Location & Zip-code: LinkedIn: Title: RTL Design Engineer Project Location: Santa Clara, CA - Onsite Duration: 12+ months contract JOB DUTIES: Responsible for RTL design using Verilog HDL for implementation and debug. ... - Jun 15
Technical Architect - Hardware Design
Midas Consulting
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Santa Clara, CA, 95053
... Should have experience in FPGA design and development (VHDL & Verilog) Should have good exposure in Digital & Analog designs. Should have experience in Obsolescence management. Should have hands on experience in architecture like 8/16/ 32-bit ... - Jun 09
Memory Controller Designer/RTL Engineer
Zenex Partners
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San Jose, CA
... Verilog expertise is required as is a deep understanding of ASIC design flow including RTL design, verification, logic synthesis, prototyping, DFT, timing analysis & ECO. Knowledge of memory controller u-architecture. Familiarity with different ... - Jun 13
Design Verification Engineer
Ripple Technology Inc.
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Milpitas, CA, 95035
Qualifications:MS or higher degree in EE, CS or related fields,Experience requirements:Entry level positions: 0-2 years of experienceSenior and above level positions: a minimum of 2 years of experienceProficiency in System Verilog, Object Oriented ... - May 23
Senior Electrical Engineer
Intelliswift Software, Inc
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Sunnyvale, CA, 94087
... Must have for FPGA: need to know how to code Verilog. Good to have skills: PCB board design and bring up Electrical Engineering design verification and validation Electrical Engineering single simulation capability - May 26
Lead ASIC Verification Engineer
Lumotive
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San Jose, CA
... Strong knowledge in ARM based SOC verification, building System Verilog and Verilog-A Model for complex Analog Subsystem. Experience in building Verilog and Verilog A model for Analog components. Experience with SystemVerilog, UVM and AMS ... - Jun 08
Design Verification Engineer
Sapear Inc
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Mountain View, CA, 94043
Job Description What You'll Be Doing: At-least 10+ years of experience in System Verilog HVL and C++/C At-least 10+ year of experience in UVM. Experience in complete verification cycle which includes development of test plan, BFM/Driver/Monitor ... - Jun 14
RTL Design Engineer
LanceSoft, Inc.
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San Jose, CA
... PREFERRED EXPERIENCE: • 10 years' experience in RTL coding • Knowledge of PCIe Gen5 and PIPE specification • Knowledge of ASIC development flows • Knowledge of system verilog • Multi-clock domain designs. • Design constraints for synthesis and ... - May 26
Senior ASIC Verification Engineer
USA Tech Recruitment
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San Jose, CA
... Memory hierarchy, Cache coherency, Virtual memory, Multicore CPU operation Familiarity with AMBA/APB/AXI Protocol Familiarity with processor peripheral interfaces like SPI, eMMC, *MII, GPIO, I2C Excellent Verilog/System Verilog programming skills. ... - Jun 02