| Job alert | Jobs 1 - 10 of 12 |
Mixed Signal Verification Engineer
Everest Consultants, Inc.
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Hillsboro, OR
... Cadence Virtuoso, Xcelium, AMS-Designer, Verilog-AMS, and Spectre). Experience with SerDes is required We will consider digital verification engineers with 4+ years of UVM experience that are interested in mixed signal verification. Experience with ... - Apr 26
Mixed Signal Verification Engineer
Insight Global
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Hillsboro, OR
... Experience with Verilog-A, Verilog-AMS, and SystemVerilog. Experience with scripting languages such as Python, Perl, or Tcl. Experience with Cadence AMS Designer and Xcelium. Experience with analog and digital design. Strong problem-solving and ... - May 19
Embedded Software Engineer
WorkSource Oregon
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Aloha, OR, 97078
... PREFERENCES: * Familiarity with GIT revision control, Python, and Verilog/VHDL * Knowledge of physics and vector calculus * Knowledge of computer architecture (branch prediction, cache memory, assembly instructions) * Experience with digital signal ... - May 12
SoC Security Engineer, Platform Architecture
Apple
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Aloha, OR, 97078
... Verilog/VHDL Experience in C/C++ and interpretive language such as Perl/Python Description As part of the Platform Architecture organization, the Security Architecture team has a mission to provide rock-solid security foundation to Apple’s products. ... - May 18
FPGA Simics Model Architect
Intel
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Hillsboro, OR, 97124
... **Minimum Qualifications:** 7+ years of experience in digital design, digital verification, and at least 5 years in transaction level modeling such as languages such as SystemC, DML, or System Verilog. **Preferred Qualifications:** 8+ years of ... - May 20
Digital Verification Engineer
Skyworks
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Hillsboro, OR
... Qualifications 6+ years (BSEE), 2+ years (MSEE) or 0+ years (Phd) of relevant industry experience Experience with system-level verification in ASICs Experience in implementation with Verilog and System Verilog Experience in post-processing with ... - May 09
SoC Verification Engineer - Pre-Silicon Power Management Validation
Intel
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Hillsboro, OR
... Minimum 3 years' experience working on Power Management IP, PM Firmware, or PM SoC development, verification, or integration using Verilog/SystemVerilog/OVM/UVM Minimum 3 years' experience with writing validation plans and software to implement ... - May 06
RTL and Verification CAD Engineer
Intel
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Hillsboro, OR
... 3+ years’ work experience with one or more of the following: Hardware description languages (Verilog, System Verilog) and RTL/Validation tools (VCS, Questasim etc) Software engineering, Dev-Ops, machine-learning. 3+ years’ work experience ... - May 10
FPGA Simics Model Architect
Intel Corp.
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Hillsboro, OR
... Minimum Qualifications: 7+ years of experience in digital design, digital verification, and at least 5 years in transaction level modeling such as languages such as SystemC, DML, or System Verilog. Preferred Qualifications: 8+ years of experience in ... - May 19
FPGA Simics Model Architect
Intel
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Hillsboro, OR
... Minimum Qualifications: 7+ years of experience in digital design, digital verification, and at least 5 years in transaction level modeling such as languages such as SystemC, DML, or System Verilog. Preferred Qualifications: 8+ years of experience in ... - May 13