| Job alert | Jobs 1 - 10 of 15 |
CPU Verification Engineer
Ampere Computing
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Portland, OR
... especially OOO memory and cache coherency protocols Skilled in using industry standard HDL languages (System Verilog, Verilog, VHDL) and simulation tools Experience developing verification environments in one or more industry standard ... - Aug 31
ASIC Design Engineer
Apple
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Beaverton, OR
... Develop RTL code using - Verilog and perform synthesis to ensure high performance, low power, and area-efficient designs. - Verification: Engage with simulation-based and formal verification teams to ensure robust design validation. - Integration ... - Sep 18
Debug Tools Engineer
Apple
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Beaverton, OR
... Key Qualifications Preferred Qualifications Exposure to Pre-Silicon and Emulation verification/validation Conversant with Verilog and SystemVerilog Strong scripting skills in one of the major languages: eg. Perl, python, Tcl, bash Strong working ... - Sep 18
FPGA Simics Model Architect
Intel
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Hillsboro, OR, 97124
... **Minimum Qualifications:** 7+ years of experience in digital design, digital verification, and at least 5 years in transaction level modeling such as languages such as SystemC, DML, or System Verilog. **Preferred Qualifications:** 8+ years of ... - Sep 13
AIS Summer Intern
Skyworks
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Hillsboro, OR
... Preferred Skills Hands-on measurement and data collection with common lab equipment Python programming for test automation and data collection Simulation-based digital circuit verification with Verilog and System Verilog Programming ability in C for ... - Sep 05
Principal Engineer, CPU Verification
Ampere Computing
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Portland, OR
... Experienced in developing block level and chip level testing infrastructure using industry standard languages like System Verilog, SVTB, UVM/OVM and simulation tools Familiarity with ARM or x86 or RISC V/SPARC architecture and assembly language ... - Aug 27
Senior Principal Engineer, CPU Verification
Ampere Computing
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Portland, OR
... interconnect protocols Experienced in building new verification test benches using industry standard languages like System Verilog, SVTB, UVM/OVM and simulation tools Programming experience in languages common to the industry (e.g., C, C++, Perl, ... - Aug 27
Research Engineer
Galois
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Portland, OR
... Knowledge of hardware engineering languages and platforms such as VHDL, Chisel, Bluespec, SystemVerilog, and Verilog. Security and Citizenship Requirement The employee must not require a U.S. government export license to authorize access to export ... - Sep 23
Digital Verification Engineer
Skyworks
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Hillsboro, OR
... Experience with system-level verification in ASICs Experience in implementation with Verilog and System Verilog Experience in post-processing with Python Experience with embedded C/C++ code Experience with UVM Professional, open and highly self ... - Sep 13
Sr. Principal Digital Verification Engineer
Skyworks
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Hillsboro, OR
... Engage early in the verification process to understand the verification requirements and participate in UVM or System Verilog testbench development. Create and execute upon test plans. Will be responsible for creating tests to verify the SOC design ... - Aug 29