HCLTech
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Santa Clara, CA, 95053
... DFT Engineer Austin, TX OR Bay Area, CA 2 Open Role JD for DFT below: Knowledge of DFT techniques and features for digital logic (1149.1, 1149.6, 1687, 1500, Scan, On-chip clock control, Test compression, Logic Built-in-Self-Test, Boundary scan) ... - Jun 18