| Job alert | Jobs 31 - 40 of 304 |
Design Verification Engineer
TEKsystems
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Bengaluru, Karnataka, India
... Technical Skills: Proficient in Verilog for hardware design and verification. Strong experience with UVM for building reusable, scalable verification environments. Knowledge of UPF for low-power design verification. Proficient in Python for ... - Jun 18
Senior Build and Release Methodology Engineer
NVIDIA
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Sadduguntepalya, Karnataka, 560029, India
... Background in RTL (Verilog), Verification (UVM, System Verilog) and C/C++ is a plus - Not must. Experience in synthesis and physical design is a plus - Not must. JR1973962 - Jun 05
Senior IP/SOC verification engineer
Sivaltech
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Bengaluru, Karnataka, India
.Working experience in IP/ASIC/ SoC verification · Should have the expertise to develop block level / system level verification environments using System Verilog and UVM / OVM · Experience to develop BFMs / Checkers / monitors / Scoreboards · Should ... - Jun 18
Verification Engineer, Performance
NVIDIA
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Sadduguntepalya, Karnataka, 560029, India
... 2+ years of experience in the field of Computer architecture / CPU Architecture / Performance analysis / workload analysis Master's or Bachelor's degree in EE/CS or related field Hands-on experience with HDLs such as Verilog / System Verilog. ... - May 22
Senior Design Verification Engineer
ACL Digital
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India
... verification Hands on experience with assembly, UVM, SV, C++ Experience in developing complex test bench/model in UVM, Verilog, System Verilog Hands on experience in developing test plans, coverage closure Ability to code readable, maintainable ... - Jun 07
RTL Design Engineer
Wipro
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Bengaluru, Karnataka, India
... Expertise in IP design, Subsystem/Cluster and SoC level integration using Verilog/System Verilog. In depth knowledge on RTL quality checks (Lint, CDC). Knowledge of synthesis and low power is a plus. Good understanding of AMBA bus protocols (AXI, ... - May 25
Senior Lead
Sivaltech
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India
· Working experience in IP/ASIC/ SoC verification · Should have the expertise to develop block level / system level verification environments using System Verilog and UVM / OVM · Experience to develop BFMs / Checkers / monitors / Scoreboards · ... - Jun 05
Staff Engineer - RTL Design
Silicon Labs
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Hyderabad, Telangana, India
... Skills you’ll need: Required Verilog RTL design with demonstrated experience of taking designs through the silicon development lifecycle to production Knowledge of embedded processor systems and C coding Experience in block and chip-level ... - May 29
IP Verification Engineer
Acesoft Labs India Pvt. Ltd.
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Hyderabad, Telangana, India
... • Proven track record of building test plan, UVM Environment and test benches • Experience with RTL debugging, scoreboard, assertions, functional coverage coding and code coverage analysis • Sound knowledge of Verilog and System Verilog languages • ... - May 31
SoC Verification Engr
NXP Semiconductors
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Noida, Uttar Pradesh, India
... • Advanced knowledge of Verilog and System Verilog languages. • Knowledge of Power Aware verification (CFF/UPF) methodologies. • High proficiency in Metric Driven Verification concepts, functional and code coverage. • High proficiency in directed ... - May 29