| Job alert | Jobs 31 - 40 of 508 |
Senior Verification Engineer
NXP Semiconductors
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Noida, Uttar Pradesh, India
... · Experience in EDA tools associated to Digital FE from Cadence (Xcelium, Simvision, Verisium) and / or Synopsys (VCS, Verdi) is a must. · Fluency in design & verification languages such as VHDL, Verilog, C and System Verilog. · Skilled in EDA test ... - Jun 16
Physical Design Engineer
L&T Technology Services
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India
... • Knowledge of industry standard EDA tools (Synopsys, Cadence, Mentor) • Worked on DSM technologies, tsmc 5nm and below experience preferred. • Knowledge of scripting skills. • Minimum Experience : 5+ years - May 30
Physical Design Engineer
Wipro
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Bengaluru, Karnataka, India
... Must have hands-on experience on Synopsys/Cadence tools. (Innovus, ICC2, Primetime, PT-PX, Calibre). Well versed with timing constraints, STA and timing closure. Inspirational leadership style, good communication skills, and ability to work in a ... - May 25
Lead Physical Design Engineer
L&T Technology Services
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India
... • Knowledge of industry standard EDA tools (Synopsys, Cadence, Mentor) • Worked on DSM technologies, tsmc 5nm and below experience preferred. • Knowledge of scripting skills. • Minimum Experience: 8+ years - Jun 19
DFT Engineer
LanceSoft, Inc.
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Hyderabad, Telangana, India
... Insertion using DFTCompiler or equivalent -Exposure to industry standard ATPG tools like Mentor TestKompress, Synopsys TetraMax, Cadence Encounter Test -Industry standard simulation tools such as VCS, Questasim, NCVerilog -Scripting in Perl and Tcl ... - Jun 01
Analog Layout Engineer
Wipro
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India
... Tool exposure to Cadence and Calibre. Good hands on experience in FinFet layout design. Good knowledge in optimized layout design for better performance - Jun 19
Memory Design Engineer
ACL Digital
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Bengaluru, Karnataka, India
... Some Experience of working on Cadence or Synopsys flows. Experience with Circuit Simulation and Optimization of standard cells. Interested candidates can apply/share/refer profile at - May 29
Senior DFT Engineer
ACL Digital
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Bengaluru, Karnataka, India
... Tool Experience - Cadence Modus / Synopsys DFTMax/TetraMax / Mentor/Tessent Expertise in coverage improvement techniques Experience in - Stuck at, Transition, Deley faults, Bridging fault, IDDQ ATPG simulation - with SDF - should possess good debug ... - Jun 18
Service Delivery Specialist
AVASO Technology Solutions
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Mohali, Punjab, India
... Facilitate client cadence meetings and reviews with internal teams as required. How you will Drive continuous customer service improvement plans and Voice of the Customer Initiatives as required. Perform monthly and quarterly audits of CTQ parameter ... - Jun 05
Senior Hardware Engineer
HCLTech
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India
... · Experience in schematic capture tools (cadence allegro 16.6, Cadence 16.5),Altium designer, Xpediation 2.4) and Simulation tools like (LT Spice, Tina, Filter CAD, Hyperlynx) for Design analysis. · Exposure in Hyperlynx Simulation for signal ... - Jun 19