| Job alert | Jobs 61 - 70 of 343 |
Lead Verification Design Engineer
Cadence
–
Bengaluru, Karnataka, India
... Strong hands-on UVM and System Verilog coding experience and functional verification environment development is required. Prior experience in IP verification of memory IP (DDR/HBM/GDDR) would be an added advantage We’re doing work that matters. Help ... - Apr 25
Principal Design Verification Engineer
Cadence
–
Bengaluru, Karnataka, India
... Strong hands-on UVM and System Verilog coding experience and functional verification environment development is required. Prior experience in IP verification of memory IP (DDR/HBM/GDDR) would be an added advantage. We’re doing work that matters. ... - Apr 25
GPU Emulation Engineer
Intel
–
Sadduguntepalya, Karnataka, 560029, India
... of emulators (ZeBu, Palladium or Veloce) and FPGA compile flow Understanding of the flow from RTL to Emulation Good design verification skills Experience in writing Synthesizable System Verilog/Verilog code and System Verilog assertions. ... - May 15
Lead Design Engineer
Cadence
–
Bengaluru, Karnataka, India
... • Strong hands-on UVM and System Verilog coding experience and functional verification environment development is required. • Prior experience in IP verification of memory IP (DDR/HBM/GDDR) would be an added advantage. We’re doing work that matters. ... - Apr 25
Lead Solutions Engineer
Cadence
–
Bengaluru, Karnataka, India
... Required experience Strong background on functional verification fundamentals, environment planning, test plan generation, environment development System Verilog experience and experience with UVM based functional verification environment ... - May 01
Test & Validation Engineering, Sr Engineer
Synopsys
–
Sadduguntepalya, Karnataka, 560029, India
... HDL Languages coding experience preferably in Verilog/VHDL/System Verilog -Some understanding in Formal verification, Simulation, writing of system verilog assertions, constraints properties -Based on project assigned, the job would involve one or ... - May 13
SoC MicroArchitect
SiliconAuto India
–
Bengaluru, Karnataka, India
... Proficiency in hardware description languages (Verilog, VHDL) and microarchitecture modeling tools (SystemVerilog, SystemC). Experience with SoC design methodologies, including RTL design, synthesis, timing analysis, and physical design. Strong ... - May 16
Cybersecurity Engineer - KMS
Aptiv
–
Bengaluru, Karnataka, India
... knowledge of Keys, random number generation, and handling of crypto material Have knowledge of Hardware description languages (Verilog, VHDL) and software languages (assembly, C, C++, Python) Experience using JTAG/SCAN/Chip-Whisperer or other direct ... - May 17
Lead Verification Design Engineer
Cadence
–
VasanthaNagar, Karnataka, 560001, India
... Strong hands-on UVM and System Verilog coding experience and functional verification environment development is required. Prior experience in IP verification of memory IP (DDR/HBM/GDDR) would be an added advantage We're doing work that matters. Help ... - Apr 29
Engineering Delivery Head - Semicon & Embedded
Tech Mahindra
–
Bengaluru, Karnataka, India
... Good to know details of any one or two domains to a hands-on level – Verilog or VHDL RTL / FPGA design and design checks. Digital and mixed-signal design verification methodologies & tools – SV, UVM, Questa, VCS, ModelSim. Physical Design and ... - May 05