Broadcom
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Electronic City, Karnataka, 560100, India
... Verilog RTL/System Verilog coding SOC/Top-Level integration flows ( integrating multiple IPs and associated, clock domains ) Synthesis ( DC ) and Timing Concepts (STA) Spyglass ( lint, DFT, PM, CLK/RST, CDC) Formal Verification, Conformal LEC) Perl ... - Jun 19