| Job alert | Jobs 11 - 20 of 67 |
Senior STA Engineer - ASIC Design
PEOPLE IMPACT
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Bengaluru, Karnataka, India
We are seeking a highly skilled Senior Static Timing Analysis (STA) Engineer with 5-10 years of experience in digital ASIC design and timing closure. As a Senior STA Engineer, you will play a key role in ensuring the timing integrity and performance ... - May 31
Senior Physical Design Engineer
ACL Digital
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Bengaluru, Karnataka, India
ACL Digital is hiring for PD and STA Engineers for Bangalore and Hyderabad Locations. 3+years experience in Physical Design. Must have exp into floorplanning, STA blocks (2 blocks each) from synthesis, PnR, Timing and PV closure. - May 19
STA engineer (full chip)
QuEST Global
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Jayanagar, Karnataka, 560011, India
... · Top level timing closure with sing off STA. Top level ECO implementation strategy development for netlist, RTL and timing level changes. Scripting experience in Perl/TCL · Excellent debugging skills and ability to come up with creative solutions. ... - May 14
PDCAD
Wipro
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Bengaluru, Karnataka, India
... RTL2GDSII PD flows development experience (SNPS & CDNS tool suite) PD tool (SNPS based - both construction & sign-off) Understand sign-off reports, root-cause, troubleshoot & fix flow issues Exposure to basic constraints/timing-STA. FC synthesis - May 24
Senior Physical Design Engineer
Wipro
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Bengaluru, Karnataka, India
... Floor planning, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical Verification. •Should have experience on Physical Design Methodologies and sub- micron technology of 28nm and lower technology nodes. •Should have experience on ... - May 31
Senior Physical Design Leads
Wipro
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Bengaluru, Karnataka, India
... Floor planning, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical Verification. · Should have experience on Physical Design Methodologies and sub-micron technology of 28nm and lower technology nodes. · Should have experience on ... - May 25
Physical Design Engineer
Wipro
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Bengaluru, Karnataka, India
... Floor planning, Placement, CTS, Routing, STA, Power Integrity Analysis, Physical Verification. Should have experience on Physical Design Methodologies and sub-micron technology of 28nm and lower technology nodes. Should have experience on ... - May 25
Physical Design Innovus Expert Engineer
Mirafra Technologies
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Bangalore Urban, Karnataka, India
... Strong scripting skills in Innovus- TCL, and Python/Perl(optional) Top down floorplan and Power Grid understanding for development methodology is a must Experience with signoff convergence(STA, EMIR, PV) of the implemented subsystem Block level ... - May 16
ASIC Engineer, Implementation
Meta
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Bengaluru, Karnataka, India
... Develop Timing Constraints for RTL-Synthesis and PrimeTime-STA for the blocks and the top-level including SOC. Analyze the inter-block timing and come up with IO budgets for the various partition blocks. Develop Power Intent Specification in UPF for ... - Jun 03
Senior Physical Design Engineer
QubeHR®
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Bengaluru, Karnataka, India
... Good exposure in Floor planning, CTS, STA, Physical Verification, Basic understanding of timing constraints. Good exposure to ICC2/Innovus/Calibre/Formality/LEC tool set. Well versed in automation skills using shell/tcl/perl/python. Candidates with ... - Jun 01