Senior FPGA Engineer

Job Description

About Epirus

Epirus is a high-growth technology company dedicated to overcoming the asymmetric challenges inherent to the future of national security. Epirus' flagship product, Leonidas, is a software-defined system built using intelligent power management techniques which allow power-hungry systems to do more with less.

Job objective: This is an exciting role an innovative, high-growth defense technology company. The ideal candidate for the position is someone who has experience designing, verifying, and integrating state-of-the-art FPGA systems and embedded processing solutions for RF applications. As a Sr. FPGA Engineer, you will work closely with a talented, multi-disciplinary engineering team in a fast-paced environment to apply emerging technologies in innovative ways to rapidly produce new products. Duties

Design and verification of RTL modules for FPGA applications

Ownership of entire FPGA designs from initial architecture trades through implementation, verification, and hardware bringup, including FPGA sizing estimation and IO planning.

Lead initial testing and bring-up of custom FPGA circuit cards, validating functionality of on-board peripherals including memory interfaces, Ethernet controllers, and integrated sensors.

Automating test environment (up to and including hardware-in-the-loop testing), lab equipment, and measurement devices

Capturing design tradeoffs, state machine flow, system address maps, and block diagrams Required Qualifications

Bachelor's degree in Electrical Engineering or a related field.

5+ years of experience in FPGA design, implementation, and testing

Extensive experience implementing FPGA designs and embedded processing designs on embedded hardware

Experience working with latest generation state of the art Xilinx/Intel Parts and associated tool sets (Vivado, Quartus)

Understanding of common digital communication protocols (SPI, I2C, UART)

Development Experience of Integrated Embedded Applications (ARM, GPU)

Experience with standard bus and streaming protocols, such as AXI and AXI-Stream

Experience with Continuous Integration and Continuous Delivery processes

Active Secret or Top Secret clearance, or ability to obtain one desired but not required. Desired Qualifications

Experience with design automation, scripting languages (TCL, Python, Perl, Matlab)

Knowledge of Advanced Firmware Verification Testbench Development (UVM, System Verilog)

Skilled with Advanced High-Speed Verilog/VHDL Designs including High Speed Memory Interfaces (DDR4, HBM) and High Speed SerDes IO and Protocols (100GE, JESD204B, Interlaken)

Experience implementing Complex DSP Algorithms on FPGAs using tools such as Matlab, Simulink, HDL Coder to implement advanced communications or other designs in FPGA

Experience collaborating with software engineering team in an SoC environment to develop designs that incorporate HDL combined with embedded Linux

Good written and oral communication skills

Collaborative; capable of working across all levels of the organization

Organized; comfortable working in a fast-paced, ever-changing environment

ITAR REQUIREMENTS:

To conform to U.S. Government space technology export regulations, including the International Traffic in Arms Regulations (ITAR) you must be a U.S. citizen, lawful permanent resident of the U.S., protected individual as defined by 8 U.S.C. 1324b(a)(3), or eligible to obtain the required authorizations from the U.S. Department of State. Learn more about the ITAR here.

At Epirus, you'll work with technical peers and great people—and get first crack at some of the defining technology challenges of our time. Here, "impossible" is just a challenge. We're a diverse, fast-growing team of change-makers fueling the future of energy with revolutionary solutions. Join us and rewrite the rules.

As required by the Equal Pay Transparency Act, Epirus provides a reasonable range of minimum compensation for roles that may be hired. Actual compensation is influenced by a wide array of factors including but not limited to skill set, level of experience, and specific office location.

For the state of California only, the range of starting pay for this role is:

$140,500—$168,600 USD

Full-time