Field Programmable Gate Arrays (FPGA) Verification Engineer with

Position Overview LCS Defense is seeking a highly skilled FPGA Verification Engineer to join our classified hardware development team. The ideal candidate will develop and implement comprehensive verification strategies, including formal methods, for complex FPGA designs in high-assurance applications. You will develop UVM-based verification environments, create and execute formal verification test plans, implement formal property verification and equivalence checking, and develop coverage-driven verification methodologies. Key Responsibilities: Creating automated test frameworks

Applying formal methods for security-critical design blocks

Collaborating with RTL developers to ensure design quality Required Education, Experience and Skills: Bachelor's degree in Electrical / Computer Engineering, 7+ years of FPGA verification experience

Expert knowledge of System Verilog and UVM

Demonstrated experience with formal verification tools and assertion-based verification

Desired Skills: Experience with Cadence Jasper Gold or similar formal tools,

Knowledge of security protocols and formal security proofs,

System Verilog Assertions (SVA)

Background in mathematical logic and proof systems.

Permanent