Principal / Lead, FPGA & SoC Architecture (Wi-Fi Baseband)

Location: Kanata, Ontario, Canada (Hybrid work arrangement possible)

About Edgewater Wireless

We make Wi-Fi. Better.

Edgewater Wireless is redefining Wi-Fi from the silicon up—delivering standards-leading innovations that create strategic value for next-generation connectivity platforms and semiconductor licensing partners. With 26 granted patents and a fabless business model, Edgewater Wireless pioneered Wi-Fi Spectrum Slicing, a breakthrough technology purpose-built to address the surging global demand for higher-capacity, lower-latency wireless networks. Edgewater is supercharging the economics of Wi-Fi. At a time when incremental performance gains are no longer enough, Spectrum Slicing offers a transformative leap: enabling multiple concurrent channels within a single frequency band. The result— 10x or greater performance and 50% lower latency—benefits all devices, including legacy hardware, without requiring changes to the client side. This architecture delivers scalable, infrastructure-friendly gains across residential, enterprise, and IoT environments. Our technology is deeply aligned with the evolving standards and shaped by collaboration with Tier-one service providers, enterprises and industry bodies.

Position Overview: We seek a highly experienced and hands-on Principal / Lead Architect to spearhead the development of our next-generation digital baseband IP. Your primary mission will be to lead the successful definition, design, and validation of our core spectrum-slicing technology on an FPGA-based demonstration platform. This pivotal role requires defining the IP's architecture, making critical hands-on technical contributions, and providing foundational leadership to a growing team.

You will be instrumental in defining and implementing our strategy for cutting-edge digital chipset features, including high-throughput data paths, advanced DSP methods, and novel AI/ML-driven baseband processing. While the immediate goal is a demonstrable FPGA system that creates a licensable IP asset, you will simultaneously lay the architectural groundwork for the future full-system ASIC product. This role requires building and leading a nascent team (in-house and subcontracted), evolving from a hands-on focus towards greater technical oversight as the project progresses to the ASIC phase.

The ideal candidate will possess a deep understanding of digital architecture, Wi-Fi standards, and baseband algorithms, with a proven track record of bringing complex wireless systems to life, preferably with experience in both FPGA prototyping and ASIC development.

Key Responsibilities:

● Architect and lead the development of our next-generation, licensable Wi-Fi baseband IP core, with a primary focus on optimizing for FPGA demonstration and subsequent ASIC implementation.

● Perform hands-on RTL design and analysis of critical digital blocks, including new AI/ML hardware accelerators, data paths, memory controllers, and baseband processing units.

● Define and drive innovation in advanced baseband algorithms, including the practical implementation of AI/ML techniques for channel estimation, interference mitigation, and adaptive modulation/coding.

● Lead the selection of a target FPGA platform and define the minimum viable host system (Arm core, memory, basic I/O) required for a compelling end-to-end system demonstration.

● Drive block-level specifications for the IP core and oversee the design and verification process, ensuring alignment between the hardware, firmware, and software demo teams.

● Collaborate closely with algorithm developers, firmware engineers, and verification engineers to ensure robust functionality and performance of the IP on the FPGA platform.

● Build, lead, and mentor a new team of digital design and verification engineers, managing both internal and external resources to foster collaboration and technical excellence.

● Stay abreast of industry trends, emerging standards (e.g., Wi-Fi 7/8 features like MLO, 4K QAM), and advancements in AI/ML for wireless communications to ensure our architecture is forward-looking.

Required Qualifications:

● Master's degree or higher in Electrical Engineering, Computer Engineering, or a related field, with a strong focus on Digital IC design or Communication Systems.

● Minimum of 10 years of experience in digital hardware design, with significant experience in FPGA development and prototyping for complex systems (using Verilog/VHDL and SystemVerilog).

● Proven experience architecting and implementing complex digital SoCs or IP cores, including CPU subsystems (preferably Arm), high-throughput bus fabrics, and memory controllers.

● Deep understanding of digital signal processing (DSP) concepts and their application in wireless baseband processing (e.g., digital filtering, FFTs, equalization, demodulation, channel coding).

● Hands-on experience with both FPGA toolchains (e.g., Vivado, Quartus)

● Strong knowledge of Wi-Fi standards (Wi-Fi 6/7/8) and their implementation challenges.

● Demonstrated experience leading hardware development projects from initial concept through to successful system-level demonstration and validation.

Preferred Qualifications:

● PhD in Electrical Engineering or a related field.

● Direct experience leading an ASIC project through to tapeout and silicon bring-up, in addition to FPGA expertise.

● Experience applying AI/ML techniques to physical layer wireless communication problems.

● Familiarity with baseband algorithm development and implementation in hardware (RTL).

● Hands-on experience with ASIC RTL-to-GDSII flows.

● Experience with Edgewater's Spectrum Slicing technology or other multi-channel approaches such as leveraged in DOCSIS or 5G.

What We Offer:

● A unique opportunity to be a key, early leader in building a new team and defining the core IP that will power Edgewater's future, directly shaping the global Wi-Fi standard.

● Join a leading innovator and drive advancements in digital SoC design, Wi-Fi 7/8, and cutting-edge AI/ML applications for communications.

● Start with deep hands-on technical contribution on a fast-paced, high-impact FPGA project, and grow into a broader leadership role as you build your team and guide the future ASIC roadmap.

● Work in a stimulating environment where collaboration and innovation thrive, with the flexibility of a hybrid work model.

How to Apply: Interested candidates are invited to submit their resume and a cover letter detailing their relevant experience and qualifications to . Please include "Principal / Lead, FPGA & SoC Architecture (Wi-Fi Baseband)" in the subject line.