• Work closely with CPU RTL and DV teams to understand changes to our CPU designs and to engineer test content for new CPU features • Create CPU validation test plans, ensuring all key features are covered • Develop SW workloads to stress test the CPU and integrate these into our existing validation environments • Help maintain and improve our random test generator by adding support for new CPU architectural and microarchitectural features • Drive the bring-up and execution of our silicon validation tools in pre-silicon (FPGAs) and post-silicon (development boards) • Debug functional silicon failures closely with Design and DV counterparts
Minimum BS and 3+ years of relevant industry experience
Experience with CPU architecture
Experience in programming in C or C++ and scripting in Python or Perl
BS or MS in Electrical Engineering, Computer Science, or Computer Engineering
Understanding of CPU architecture including instruction sets, pipelines, caches, and memory subsystems
Experience with assembly programming (ARM ISA is a plus)
Knowledge of operating system fundamentals including kernel execution, privilege levels, memory management, and virtual machines
Good understanding of the logic design and verification process
Background in silicon bring-up and system debug experience is a plus
Strong problem-solving skills