Lead Design Verification Engineer (DDR)

SBT is the exclusive executive recruiting firm for this confidential position.

This confidential company is strategically bringing on a hands-on technical DV lead. In this role, the verification expert will be collaborating cross-functionally with a talented team of systems HW engineers and SW architects in developing cutting-edge computing systems. This individual will have first-hand involvement in the full lifecycle of complex chip development, solving complex challenges directly affecting tier-one customers.

Technical Responsibilities

Verification Planning and Strategy

Develop verification plans and strategies based on design specifications and requirements to ensure thorough testing and validation of semiconductor designs

Create verification methodologies, test benches, and test cases to effectively verify and validate digital designs, including RTL (Register Transfer Level) designs

Building DV infrastructure

Define and develop a comprehensive suite of verification infrastructure and tests that can be leveraged across both ASIC and FPGA platforms

Collaborate with cross-functional teams to ensure that verification infrastructure and tests are aligned with design requirements and can be effectively used to validate designs

Qualifications

Technical degree in related engineering field

5-10+ years of relevant industry experience

Expertise in DDR, with a preference for DDR4/DDR5

Proficiency in verification languages and methodologies, such as SystemVerilog, UVM

Expertise in network switching data paths related technology is required

Relevant company backgrounds include: AMD, Marvell, Cisco, Broadcom, Intel, Qualcomm, and other networking companies