Senior FPGA Design Engineer

Triple Crown is a leading provider of hardware, embedded, software, and mechanical engineering talent. Businesses and technology teams, from Fortune 500 enterprises to emerging startups, rely on our ability to rapidly place the developers, architects, coders, and designers who engineer digital transformation and growth.

CONTRACT Position: 12 Months

Location: Onsite in El Segundo, CA or Northridge, CA (preferred)

US Citizens

We are seeking an experienced FPGA Design Engineer to join our engineering team on a contract basis. In this role, you will be responsible for architecting, designing, and implementing FPGA infrastructure targeted for server applications. You will leverage your expertise with Xilinx Vivado to develop high-performance, reliable FPGA solutions that integrate seamlessly into complex hardware systems.

System Verilog/Verilog

Xilinx Vivado experience, it will be a plus if they also have other tools like Intel Quartus Prime or Lattice.

Experience integrating on a Linux platform. All their processors are on Linux. BIG plus if they have PetaLinux experience.

Experience writing RTL

Experience with Xilinx Vivado is preferred, or similar SW tools that's used on SoC.

Must have Digital Communication experience such as networking and1 gig ethernet. Some of the common serial communication protocols he mentioned were SPI, I2C, RS422, ethernet.

Experience implementing networks in FPGA, AXI, AXI-Stream

Xilinx FPGA experience

FPGA RTL design experience (Verilog/SystemVerilog)

Experience throughout the FPGA/HW product development lifecycle

Define system requirements, decompose system requirements and develop HW level requirements

Design implementation

Verification and artifact development/documentation

Verification experience with Python is a must (they don't do UVM)

Experience with pipelining, timing, and clock gating to optimize a design and meet the required timing constraints

Board bring up and troubleshooting (know how to use an oscilloscope)

Skills:

Verilog/System Verilog (MUST HAVE)

Xilinx Vivado

RTL

SPI

I2C

Ethernet

SoC

Benefits:

Paid weekly!

Health, Dental and Vision Insurance

401k