Design Verification Engineer

Senior ASIC Verification for AI Chips. 2 ( Openings_

FULL-TIME- Direct Hire.

Fortune 500 Client.

Job Requirements:

Experience in verifying designs at system level and block level.

Fluent knowledge of RTL verification methodologies including System Verilog.

Strong experience in ASIC design verification flows and DV methodologies.

Strong working knowledge of object oriented verification languages (OVM, UVM, etc.), C/C++, Perl, and scripting skills.

Experience with hardware design and debug, C++/SystemC and other programming languages are a strong pl

- Experience with hardware design and debug, C++/SystemC and other programming languages are a

strong plus.

Familiarity with overall chip design methodologies and tools.

Knowledge of CPU, DDR, Bus Protocol, Network Protocol or DSP design preferred.

***Having PCie is a nice to have but not a Must Have.

*No H1B Transfer Assistance at this time.