ASIC Engineer - Infra Silicon Characterization

Meta is hiring ASIC Engineers within the Infrastructure organization.

We are looking for individuals with experience in the entire Silicon Lifecycle, to build and scale silicon for data center applications.As an ASIC Engineer in the Infra Silicon Characterization team, you will be part of a dynamic team working with the best in the industry, focused on developing and supporting innovative ASIC solutions for Meta’s data center applications.

Responsibilities:

ASIC Engineer - Infra Silicon Characterization Responsibilities:

Work across all aspects of silicon lifecycle to deliver reliable and performant silicon solutions - from early architecture and design inputs, dft concepts, bring-up and post-silicon characterization.

Create/develop characterization and automation tool sets targeted at silicon qualification - inclusive of, but not limited to electrical conformance, silicon diagnostics, silicon telemetry, debug tools, and lab automation.

Define / develop test boards used to bring-up / characterize silicon.

Provide feedback into next generation models and design with insights from silicon characterization.

Leverage deep technical skill set in ASIC design, and/or complex test development to build & execute comprehensive post-silicon test plans. Develop/define related lab automation.

Root-cause, resolve and remediate issues with silicon across the product lifecycle.

Define PVT (Process/Voltage/Temperature) operating conditions to ensure silicon meets required specifications for its intended applications.

Qualification and experience:

Minimum Qualifications:

Bachelor's degree in Computer Science, Computer Engineering, relevant technical field, or equivalent practical experience.

8+ years of experience in hands-on SW/HW Engineering / ASIC development cycles.

4+ years of knowledge/understanding of silicon/systems qualification.

4+ years of experience with SerDes characterization (PCIe, networking, memory).

3+ years of expertise in silicon characterization related to PVT (Process/Voltage/Temperature).

Experience in Python (lab automation and data analysis).

Experience working with internal and external partners for ASIC and/or systems development.

Experience debugging SW/FW/HW leveraging board schematics and instrumentation in a lab environment.

Experience with developing test plans and holding data reviews.

Preferred:

Preferred Qualifications:

4+ years of experience in ASIC Design, Development or Characterization (Silicon bring-up, characterization, debugging, etc).

4+ years of experience with some of the following modules/domains: PCIe, Networking, Flash, Memory, CPU, GPU, DRAM (LP/DDR4/5 and/or HBM).

4+ years of experience developing and/or reviewing PCB schematic designs and with debugging tools for systems-on-chip (SoCs).

3+ years of experience working across and building relationships with cross-functional teams - architecture, design, model, emulation, validation and systems teams.

3+ years of experience with statistical analysis and defining functional stability.

Experience with Silicon used in Video, AI/ML and Networking.

Experience with high-speed SerDes

Knowledge of how embedded systems work, including common bus protocols, such as I2C, SPI, USB, and/or PCIe.

Experience with revision control systems like Mercurial(Hg), Git or SVN.