Application Specific Integrated Circuit Design Engineer

Clock mesh implementation:

Create clock-mesh for chip-level and block-level. Work on skew reduction.

Write tcl scripts for clock station and mesh spine analysis simulations in Primesim, Finesim, Hspice, and XA.

Measure clock jitter due to DC/AC noise on power rails of a fullchip clock tree.

Perform Simulation of clock tree for OCV adjustment.