System Architect - Analog/Mixed-Signal IC

Key Responsibilities:

Define and develop state-of-the-art SoCs tailored for modern communication infrastructures, balancing performance, power efficiency, and cost

Translate system-level requirements into detailed block specifications for internal and external design teams

Build and maintain system-level models of data converters using MATLAB and Verilog to simulate performance under various operating modes

Collaborate with both analog and digital implementation teams to validate design integrity and functionality

Perform end-to-end simulations of the signal chain using mixed-signal methodologies

Create and manage top-level simulations to verify mode operation and ensure proper implementation of design features

Work alongside a global team of highly skilled ASIC developers

Contribute to team effectiveness through knowledge sharing, peer reviews, and collaborative problem-solving

Required Qualifications:

MS or PhD in Electrical Engineering or a related field, with 7+ years of experience modeling radio systems or data converters in MATLAB

Solid understanding of communications standards and how they relate to both wireless and wired technologies

In-depth knowledge and experience in at least three of the following areas: high-speed DACs, SerDes circuits, broadband drivers, low-jitter PLLs, low-noise clock architectures, opamps/VGAs, or DSP-based equalization

Proven ability to work independently while coordinating effectively with broader design teams

Willingness to travel occasionally to locations in the U.S. and Europe

Must be a current U.S. resident with valid work authorization

Preferred Experience:

Background in mixed-signal design across both analog and digital subsystems

Experience in BiCMOS design environments

Familiarity with analog design tools such as Cadence Virtuoso, Verilog-AMS, Spectre, Xcelium, and AMS-Designer

Knowledge of SerDes front-end architecture, including concepts like CDR, DFE, CTLE, and jitter analysis