Sr Digital Physical Design Engineer

Overview

Keysight is on the forefront of technology innovation, delivering breakthroughs and trusted insights in electronic design, simulation, prototyping, test, manufacturing, and optimization. Our ~15,000 employees create world-class solutions in communications, 5G, automotive, energy, quantum, aerospace, defense, and semiconductor markets for customers in over 100 countries. Learn more about what we do.

Our award-winning culture embraces a bold vision of where technology can take us and a passion for tackling challenging problems with industry-first solutions. We believe that when people feel a sense of belonging, they can be more creative, innovative, and thrive at all points in their careers.

Responsibilities

A major success factor for the company continues to be the development and deployment of breakthrough Digital/DSP and mixed signal ASICs that drive the performance and value of new products. We have an exciting opportunity for an experienced Physical Design R&D engineer responsible for the physical design and tape release of digital and mixed signal ASICs.

About the Team:

We are located in Colorado Springs, Colorado at the base of Pikes Peak. You'll collaborate in a team environment to design and verify digital / DSP and mixed signal ASICs that meets customer functionality, schedule, and quality requirements. This job will be part of Keysight Laboratories, a world-renowned technology organization which enables Keysight to be first to market with breakthrough products and solutions. Responsibilities

Experienced Digital Physical Design ASIC R&D engineer responsible for both module level as well as SoC Level implementation from RTL to GDS of digital and mixed signal ASICs. Solves complex and high impact design and development problems including customer application issues of varying scope and complexity. Uses product and customer applications knowledge to determine, define, develop, and validate design concepts and methods.

Participate in the entire spectrum of full ASIC design activities including definition, architectures, digital logic design, IP validation and synthesis.

Responsible for floor planning, PNR, timing closure, STA, formal verification, low power design, clock distribution, EMIR analysis and physical verification

Close sign-off checks, interface with industry foundries and GDS delivery

Work extensively with cross functional teams to guide architecture with physical design constraints

Develop tool flows and drive vendors to achieve milestones Qualifications

Bachelors or master's degree in electrical or computer engineering. Typically, 20 years relevant experience. Requires extensive experience and knowledge and ability to work independently.

Basic Qualifications:

Industry tapeout experience

Desire to identify and debug problems.

Experience with Innovus, Tempus, Voltus and Genus

Experience with task automation and scripting

Strong EE fundamentals with experience in ASIC Design, DSP, digital architectures/systems, and verification of large and mixed signal ASIC designs

Leadership skills to gain credibility and respect to drive change and influence teams and partners towards higher levels of execution, return, and productivity

Strong teamwork and written/verbal communication skills

Wanted Qualifications:

Experience in digital and analog ASIC design flow, methodologies, and process

Experience with DFT architecture and implementation

Fluent with object-oriented programming

Ability to multi-task and to engage with multiple projects, engineers, and partnerships

Other Information:

Relocation is available for this position

Visa Sponsorship is not available for this position

Careers Privacy Statement***Keysight is an Equal Opportunity Employer