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Silicon Validation Engineer, TPU

Google  –  Madison, WI
$113,000-$161,000 +
... ASIC life-cycle, ensuring proper features are in place for post-silicon validation and debug. You will collaborate with system software and software test infrastructure developers to ensure we have proper ASIC test coverage for an entire program. ... - May 18

Infrastructure Technician

GLOCK, Inc.  –  Smyrna, GA, 30082
General Purpose: Maintains a safe operating condition of buildings, equipment, and landscape in and around GLOCK, Inc. and GLOCK owned facilities. Duties may involve carpentry; repairing electrical or mechanical equipment; installing new equipment... - Jun 04

ASIC Synthesis/STA Engineer

AXONNE  –  San Jose, CA
... is a Silicon Valley startup that provides cutting-edge semiconductor solutions for the automotive industry with innovative ... As we continue to grow and expand, we are seeking a dynamic and experienced ASIC Synthesis/STA Engineer to join our team and ... - Jun 04

Sr. ASIC Design Engineer

ScaleFlux  –  San Jose, CA
... ASIC Design Engineer to join our rapidly growing ASIC design team focused on high performance data center infrastructure ASIC design and SOC development. The ideal candidate for this role shares our passion for creating innovative technologies, and ... - Jun 04

ASIC Validation Engineer

ScaleFlux  –  San Jose, CA
We are looking for Validation Engineers to join our rapidly growing engineering team focused on breakthrough cloud and data center storage infrastructure solutions. This is an experienced position in a firmware development team to develop next ... - Jun 04

Infrastructure Technician

GLOCK, Inc.  –  Smyrna, GA, 30082
General Purpose:Maintains a safe operating condition of buildings, equipment, and landscape in and around GLOCK, Inc. and GLOCK owned facilities. Duties may involve carpentry; repairing electrical or mechanical equipment; installing new equipment... - Jun 03

ASIC Silicon Infrastructure Engineer

Meta  –  Sunnyvale, CA
META is hiring ASIC Silicon Infrastructure Engineer within our Reality Lab ASIC organization. We are looking for individuals with experience in EDA flow, CAD/automation and ASIC infrastructure to build efficient System on Chip (SoC) and IP for our ... - May 12

ASIC Physical Design Engineer

Google  –  Sunnyvale, CA
$132,000-$189,000 +
... Experience with silicon interposer design. Experience crafting physical design automation flows. Experience with EMIR ... As an Application-Specific Integrated Circuit (ASIC) Physical Design Engineer on the Chip Implementation team, you will work ... - May 20

Senior Design Engineer (ASIC/RTL Design)

Infobahn Softworld Inc  –  Santa Clara, CA, 95053
We have an open position for a Senior ASIC/RTL Design Engineer with one of our esteemed clients. Please connect with us to ... Participate in silicon bring-up for features owned. Contribute in cross-functional teams to solve novel problems across ... - Jun 04

ASIC Physical Design Lead

Google  –  Sunnyvale, CA
$183,000-$271,000 +
... 8 years of experience in ASIC physical design and methodologies in advanced process nodes. Experience leading teams through ... Experience with silicon interposer design. Experience crafting physical design automation flows. About the job In this role, ... - May 25
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