Senior RTL Design Engineer

Triple Crown is a leading provider of hardware, embedded, software, and mechanical engineering talent. Businesses and technology teams, from Fortune 500 enterprises to emerging startups, rely on our ability to rapidly place the developers, architects, coders, and designers who engineer digital transformation and growth.

CONTRACT Position: 6+ Months

Location: Onsite in Irvine, CA

US Citizens

We are seeking a highly skilled and motivated Senior RTL Design Engineer to join a hardware design team. You will play a key role in the architecture, design, and implementation of high-performance digital circuits and subsystems using RTL (typically Verilog or VHDL). This position requires a deep understanding of digital design, strong debugging skills, and the ability to work collaboratively across multiple teams.

Bachelor’s or Master’s degree in Electrical Engineering, Computer Engineering, or related field.

5+ years of hands-on experience in RTL design using Verilog and/or VHDL.

Proven track record of delivering complex ASIC/FPGA designs from concept to tape-out.

Strong understanding of digital logic design, synchronous design, and finite state machines.

Experience with synthesis, STA, lint, and CDC tools (e.g., Synopsys, Cadence, Mentor).

Familiarity with scripting languages such as Python, Perl, or Tcl.

Excellent problem-solving skills and attention to detail.

Effective communication and teamwork abilities.

Skills:

RTL

Verilog

VHDL

ASIC

FPGA

STA

CDC

Benefits:

Paid weekly!

Health, Dental and Vision Insurance

401k