PCIe Validation and Emulation Engineer

We are seeking a PCIe Validation & Emulation engineer in San Jose, CA.

Title: PCIe Validation & Emulation Engineer

Location: San Jose, CA

Duration: Long Term Contract

Responsibilities:

Create and document PCIe validation test plans, test cases, and scripts.

Perform compliance testing to ensure adherence to PCIe standards.

Identify and resolve performance bottlenecks within the PCIe interface.

Work closely with hardware and software design teams, and potentially other stakeholders, to ensure successful integration and validation of PCIe subsystems.

Key Skills:

PCIE 4.0, 5.0. 6.0, C/C++, IOMMU, RISC V, x86-64 architecture, accelerator, Oscilloscope, Multimeter, Logic Analyzer, performance benchmarks

Qualifications:

Good knowledge and understanding of PCIe Architecture, Validation, Debug Experience.

Exposure to PCIe BAR and IOMMU architecture

Develop the critical pieces of EAI Firmware used to deploy inference jobs on EAI processors

Advanced programming skills in C/C++ for operating system kernel & systems development

Understanding of RISC-V architecture is a plus

Deep understanding of operating systems concepts, data structures, x86-64 and accelerator architectures

Experience running, analyzing, and tuning system performance benchmarks

Experience with low-level debug tools as well as emulators and simulators

Excellent understanding of computer architecture and operating system concepts including, but not limited to, memory management

Experience in Hardware Debug Skills - Oscilloscope, Multimeter, Logic Analyzer