We seek a skilled front-end SoC design engineer. A customer driven professional with a track record of effective collaboration with internal and external teams. A key contributor developing robust next generation digital design solutions. These are customer specific chiplets with challenging performance - power requirements. Great team members and leadership. Technical growth with cutting edge tech. Excellent work-life balance. Hybrid Santa Clara, CA. Flexible hours.
You will: Work at the hardware level of SOC design. Support customer's design through all phases of ASIC execution. Ensure designs meet PPA (Power, Performance and Area) requirements. Your tasks may include: architecture - micro-architecture; logic design; RTL integration and coding; Lint/CDC/DFT checks; synthesis & supporting timing-closure. You may also contribute and support ... verification, firmware, and silicon bring-up.
What will get our attention:
SoC architecture.
Micro-architecture and front-end design.
Solid understanding of clock-domain crossings.
Writing timing constraints and timing analysis.
Lint and CDC execution and analysis.
AMBA bus protocols.
System Verilog. Highly Desirable:
PhD/MS
Chiplet technologies (2, 3, 5 nm).
Work experience in design services.
2-3 of the following: CPU (preferably, ARM and/or RISC-V), or GPU, or DSP; SoC Memory hierarchy; NoC -Fabric; low-power design and verification; high-speed peripheral interfaces such as CSI, HDMI - DP, I3C, USB, PCIe; Machine-learning, AI; FPGA.
Title: Engineer (mid-senior career)
Location: Santa Clara, CA. Hybrid. Relocation assistance is offered.
Compensation: Open, though anticipate an annual base salary of $180,000 - $220,000. Performance based incentives. Retirement plans. 401k matching. Generous holiday and PTO. Comprehensive benefits.
* Highly qualified H1B visa holders and TN eligible professionals are encouraged to apply *