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Performance/Power Optimization Product Engineer Intern

Company:
Intel
Location:
Santa Clara, CA
Posted:
May 14, 2025
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Description:

Job Details:

Job Description:

Intel is seeking a Performance/Power Optimization Product Engineer Graduate Intern to analyze and enhance the 14A Technology node offering from a customer's perspective. This role focuses on improving design collateral offerings such as PDK, PNR, and PPA to increase ease-of-use for end customers. You will collaborate with Intel experts to refine and optimize our technology offerings, contributing to the advancement of semiconductor design.

In this role, your responsibilities will include:

Analyze customer feedback and requirements to identify areas for improvement in the 14A Technology node offering.

Collaborate with cross-functional teams to enhance design collateral offerings, including PDK, PNR, and PPA.

Develop strategies to optimize power consumption, performance metrics, and area efficiency in semiconductor designs.

Conduct research and apply advanced techniques to improve the usability and effectiveness of design tools.

Present findings and recommendations to stakeholders to drive continuous improvement in product offerings.

Run and analyze Ring Oscillators (RO) or Place and Route (PNR) studies to establish technology node value.

Qualifications:

You must possess the below minimum education requirements and minimum required qualifications to be initially considered for this position. Relevant experience can be obtained through schoolwork, classes, project work, internships, and/or military experience. Additional preferred qualifications are in addition to the minimum requirements and are considered a plus factor in identifying top candidates.

Minimum Qualifications:

Pursuing a Master's Degree in Electrical Engineering, Electronics and Communication Engineering, or a related STEM field.

Analyzing and optimizing designs to improve power consumption, performance metrics, and area efficiency using synthesis or PNR tools

Creating and optimizing custom integrated circuits, particularly in analog, mixed-signal, and RF domains.

Preferred Qualifications:

Expertise in SRAM design or standard cell design.

IR drop analysis, STA, leakage recovery, or other signoff domains.

Experience running ring oscillators or other spice simulations.

Experience running place and route (P&R) tools.

Join our team of innovators and contribute to shaping the future of Intel's technology offerings!

Job Type:

Student / Intern

Shift:

Shift 1 (United States of America)

Primary Location:

US, California, Santa Clara

Additional Locations:

US, Arizona, Phoenix, US, California, San Diego, US, Oregon, Hillsboro, US, Texas, Austin

Business group:

Intel Foundry is dedicated to transforming the global semiconductor industry by delivering cutting-edge silicon process and packaging technology leadership for the AI era. As stewards of Moore's Law, we innovate and foster collaboration within an extensive partner ecosystem to advance technologies and enable our customers to design leadership products. Our strategic investments in geographically diverse manufacturing capacities bolster the resilience of the semiconductor supply chain. Leveraging our technological prowess, expansive manufacturing scale, and a more sustainable supply chain, Intel Foundry empowers the world to deliver essential computing, server, mobile, networking, and automotive systems for the AI era. This position is part of the Foundry Services business unit within Intel Foundry, a customer-oriented service organization that is dedicated to the success of its customers with full P&L responsibilities. We ensure our foundry customers' products receive our utmost focus in terms of service, technology enablement and capacity commitments.

Posting Statement:

All qualified applicants will receive consideration for employment without regard to race, color, religion, religious creed, sex, national origin, ancestry, age, physical or mental disability, medical condition, genetic information, military and veteran status, marital status, pregnancy, gender, gender expression, gender identity, sexual orientation, or any other characteristic protected by local law, regulation, or ordinance.

Position of Trust

N/A

Benefits:

We offer a total compensation package that ranks among the best in the industry. It consists of competitive pay, stock, bonuses, as well as, benefit programs which include health, retirement, and vacation. Find more information about all of our Amazing Benefits here:

Annual Salary Range for jobs which could be performed in the US:

$63,000.00-$166,000.00

Salary range dependent on a number of factors including location and experience.

Work Model for this RoleThis role will be eligible for our hybrid work model which allows employees to split their time between working on-site at their assigned Intel site and off-site. * Job posting details (such as work model, location or time type) are subject to change.

JR0275576

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