Post Job Free
Sign in

Digital IC Design Engineer

Company:
Neuralink
Location:
Rollingwood, TX, 78716
Posted:
May 14, 2025
Apply

Description:

About Neuralink:

We are creating devices that enable a bi-directional interface with the brain. These devices allow us to restore movement to the paralyzed, restore sight to the blind, and revolutionize how humans interact with their digital world.

Team Description:

The Brain Interfaces Soc Department delivers chip architecture and silicon implementation of neural recording and stimulation system-on-chip (SoC) for high-bandwidth brain-machine interface applications. We have crafted a team of exceptional engineers whose mission is to push the frontiers of what is possible today and define the future.

Job Description & Responsibilities:

Our Digital IC Design Engineer will be responsible for delivering micro-architecture and register-transfer level (RTL) implementation of digital IPs and systems with a focus in high-throughput low-power digital signal processor (DSP) and general-purpose hardware accelerators towards realizing state-of-the-art brain-computer interfaces. Relevant product development experience in micro-architecture design for low-power processors, on-chip bus and network interfaces, audio/video compression processors, AI/ML accelerators, and communication PHY/MAC will be preferred.

Micro-architecture design and RTL implementation of:

Low-power digital signal processors

Low-power general-purpose hardware accelerators

Low-power graphics processing units

Low-power radio MAC/PHY

Low-power serial link MAC/PHY

Design and optimization of hardware/software interface with firmware engineers

Application-specific architecture optimization including:

Complex system modeling for energy and performance benchmarks

Workload analysis and modeling

Energy/performance profiling and analysis

Leveraging architecture-level design trade-offs with process technology and workload type

Balancing cost and performance under manufacturing process variation

Collaboration on silicon bring-up tests with verification engineers Required Qualifications:

Bachelor of Science (B.S.) degree in Electrical Engineering and/or Computer Science or a related field, or equivalent experience

Evidence of exceptional ability in electrical engineering, computer science, or computer engineering

5+ years of experience in digital design

Expertise in SystemVerilog, C/C++, Python

Experience working on complex digital systems from architecture, microarchitecture, and RTL, using industry standard tools

Experience in designing digital signal processing pipelines, from algorithm to RTL Preferred Qualifications:

Experience in architecture optimization with process technology customization

Experience in the verification of complex digital systems, using industry standard tools

Experience in the physical design of complex digital systems, using industry standard tools

Experience testing and debugging digital system-on-a-chips

Functional modeling experience and logic verification with SystemVerilog, SystemC/C++

Experience automating tool flows

Experience with embedded design

Experience in processor instruction set architecture design

Experience in compiler back-end design and customization Expected Compensation:

At Neuralink, your base pay is one part of your total compensation package. The anticipated base salary for this position is expected to be within the below range. Your actual base pay will be determined by your job-related skills, experience, and relevant education or training.

Texas Base Salary Range

$101,300-$210,400 USD

What We Offer:

Full-time employees are eligible for the following benefits listed below.

An opportunity to change the world and work with some of the smartest and most talented experts from different fields

Growth potential; we rapidly advance team members who have an outsized impact

Excellent medical, dental, and vision insurance through a PPO plan

Paid holidays

Commuter benefits

Meals provided

Equity + 401(k) plan *Temporary Employees & Interns excluded

Parental leave *Temporary Employees & Interns excluded

Flexible time off *Temporary Employees & Interns excluded

Apply