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Silicon Verification Engineer 3

Company:
Protingent
Location:
Mountain View, CA, 94043
Pay:
82.00
Posted:
May 15, 2025
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Description:

Position Title: Silicon Verification Engineer 3

Position Description: Protingent has an exciting contract opportunity for a Silicon Verification Engineer 3 with our client located in Mountain View, CA. This role is 100 percent remote with high preference for candidates based in PST

Job Description:

The main function of Silicon Verification Engineer is to be a part of the test-plan generation process, creating, testing, and implementing various verification plans.

What makes this role interesting? - This role provides the opportunity to work on advanced chips used in AI products.

Unique Selling Points: The field of AI products is currently expanding, the field is very interesting to work in and support as this role will support the development of chips used for these products.

Job Responsibilities:

Purpose of the Team: The purpose of this team is IP verification to verify the design of high speed interface connecting different parts of an SOC chip.

Key projects: This role will contribute to internal projects that cannot be shared at the moment. They will be working on Certus interfaces and high-speed serial interfaces (CRDAS) for several projects in AI and compute.

Typical task breakdown and operating rhythm: The role will consist of meetings every day in the mornings which will go over agenda items like tasks and important actions. The remainder of their time is spent heads down focusing on assigned tasks (coding, data analysis, task management).

Job Qualifications:

Must Have 5+ yearsâ experience with System Verilog and UVM.

Must Have 5+ yearsâ experience with Mixed Signal Verification.

Must Have 5+ yearsâ experience with Design Verification Methodology.

3-7+ (ideally on the higher end) overall years of experience in the field.

Degrees or certifications required: Not required but nice to have.

The ideal resume would contain previous experience with mixed signal exposure (analog and digital), and is fluent with SystemVerilog and UVM having significant design verification experience.

Proficient in using Verilog and VMM/OVM/UVM

Experience in pre and post silicon verification test flow and automated test benches

Effective communication, collaboration, and teamwork skills

Job Details:

Job Type: Contract

Location: This role is 100 percent remote with high preference for candidates based in PST

Pay Range: $63/hr. to $82/hr.

An offer of employment is contingent on successfully passing a background check, and applicants who do not successfully pass a background check will not be considered for employment.

Benefits Package: Protingent offers competitive salaries, insurance plan options (HDHP plan or POS plan), education/certification reimbursement, pre-tax commuter benefits, Paid Time Off (PTO) and an administered 401k plan.

About Protingent: Protingent is a niche provider of top Engineering and IT talent to Software, Electronics, Medical Device, Telecom, and Aerospace companies nationwide. Protingent exists to make a positive impact and contribution to the lives of others as well as our community by providing relevant, rewarding, and exciting work opportunities for our candidates.

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