ASIC Engineer, Infra Silicon Enablement (Host & Userspace)

Meta is hiring ASIC Engineers within the Infrastructure organization.

As an ASIC Engineer in the Silicon Engineering team, you will be part of a dynamic team working with the best in the industry, focused on developing and supporting innovative ASIC solutions for Meta’s data center applications.

The role also involves partnering with Full Stack Software, Hardware, ASIC Design, Verification, Emulation, Pre/Post-Silicon Validation & Systems teams to deliver reliable and performant silicon to our applications.

Responsibilities:

ASIC Engineer, Infra Silicon Enablement (Host & Userspace) Responsibilities:

Build and scale silicon for data center applications, leveraging experience with the entire silicon lifecycle.

Work across all aspects of silicon lifecycle, from early architecture and design inputs, to pre-silicon validation, to bring-up and post-silicon to deployment in the fleet, focused on application performance and reliability.

Design and implement userspace drivers (and/or Firmware) for (network) ethernet adapter functions and AI accelerator functions.

Work directly with the design & verification team to enable a comprehensive pre and post-silicon test plan.

Develop functional, stress, and performance tools for Meta custom ASICs.

Qualification and experience:

Minimum Qualifications:

5+ years of experience in hands-on ASIC Engineering.

3+ years of experience in development with C/C++

3+ years of experience with Linux server systems or network devices (routers, switches, load balancers).

4+ years of experience working with internal and external partners for device integration and systems development.

Proven troubleshooting, debug and analytics experience across Product Lifecycle.

Preferred:

Preferred Qualifications:

Experience in ASIC Design, Development, or Validation (Silicon bringup, validation, emulation, etc.)

Experience with VFIO, DPDK, SPDK, or other userspace driver frameworks.

Experience with Linux Kernel, especially drivers and network stack.

Working knowledge of transport stack, particularly RDMA (RoCEv2)

Experience in Python

Experience with distributed computing environments such as MPI or PyTorch Distributed.

Experience with performance and debugging tools.