Senior FPGA Design Verification Engineer - Secret Clearance #2632

Direct Hire - Full Time position in Dedham, MA

Position ID: 2632

An excellent position with a major global technology solutions company

* Senior FPGA Design Verification Engineer - Secret Clearance *

Please apply ONLY if you have an active DOD Secret clearance and VHDL (or similar)

United States Citizenship is required due to government contract requirement; we are unable to sponsor at this time.

We can ONLY consider your application if you have:

1: Active DOD Secret security clearance

2: Experience with OVM / UVM design verification methodology

3: bash/csh, Perl, TCL, Python or similar scripting languages

4: VHDL or similar hardware description languages

5: The ability to work onsite in Dedham, MA

We are looking for an outstanding Senior Cyber FPGA Design Verification Engineer to be a member of a cross functional team responsible for product design from system architecture & requirements allocation through product release and production of cost-sensitive secure products.

DESIRED (not required) SKILLS:

:: Experience defining verification methodology for complex FPGAs.

:: Ability to analyze requirements, create test plan, build and set up scalable simulation environments from the ground up using SystemVerilog/UVM

:: Familiarity with testing complex designs, code coverage, functional coverage, assertions.

:: Ability to work in a dynamic environment that includes working with changing needs and requirements.

:: FPGA/ASIC design experience

:: Familiarity with Xilinx FPGA & Questa Advanced Functional Verification tools.

Please send resume to apply@amarx.com - Amarx Search, Inc. - amarx.com